Versatile architectures of artificial neural network with variable capacity

MMA Basiri - Circuits, Systems, and Signal Processing, 2022 - Springer
Artificial neural network (ANN) is widely used in modern engineering applications. The
decision on the number of layers and the number of nodes per layer in the ANN or the …

Digit-serial versatile multiplier based on a novel block recombination of the modified overlap-free Karatsuba algorithm

CY Lee, J Xie - IEEE Transactions on Circuits and Systems I …, 2018 - ieeexplore.ieee.org
Overlap-Free Karatsuba Algorithm (OFKA) combined with block recombination approach
(OFKABR) can improve the complexity of the original OFKA to obtain efficient …

An area-efficient bit-serial sequential polynomial basis finite field GF (2m) multiplier

SR Pillutla, L Boppana - AEU-International Journal of Electronics and …, 2020 - Elsevier
Many cryptographic and error control coding algorithms rely on finite field arithmetic.
Hardware implementation of these algorithms requires an efficient realization of finite field …

Input-Latency Free Versatile Bit-Serial GF(2m) Polynomial Basis Multiplication

H El-Razouk - IEEE Transactions on Very Large Scale …, 2022 - ieeexplore.ieee.org
Cryptography and error correction codes are widely used for information security and data
integrity services in modern digital computing and communications systems. A number of …

Low-power design for a digit-serial polynomial basis finite field multiplier using factoring technique

SH Namin, H Wu, M Ahmadi - IEEE Transactions on Very Large …, 2016 - ieeexplore.ieee.org
In CMOS-based application-specific integrated circuit (ASIC) designs, total power
consumption is dominated by dynamic power, where dynamic power consists of two major …

Subquadratic Space-Complexity Digit-Serial Multipliers Over Using Generalized -Way Karatsuba Algorithm

CY Lee, PK Meher - IEEE Transactions on Circuits and Systems …, 2015 - ieeexplore.ieee.org
Karatsuba algorithm (KA) is popularly used for high-precision multiplication by divide-and-
conquer approach. Recently, subquadratic digit-serial multiplier based on (a, 2)-way KA …

New digit-serial three-operand multiplier over binary extension fields for high-performance applications

CY Lee, CC Fan, SM Yuan - 2017 2nd IEEE International …, 2017 - ieeexplore.ieee.org
Digit-serial polynomial basis multipliers over GF (2 m) are broadly applied in elliptic curve
cryptography, because squaring and polynomial reduction in GF (2 m) are simple …

Low area-time complexity point multiplication architecture for ECC over GF() using polynomial basis

PKG Nadikuda, L Boppana - Journal of Cryptographic Engineering, 2023 - Springer
In the present day, billions of devices communicate over the wireless networks. The massive
information transmitted over open ended, and unsecured Internet architecture results in …

[PDF][PDF] Design and Implementation of a Sequential Polynomial Basis Multiplier over GF(2m)

SE Mathe, L Boppana - … on Internet and Information Systems (TIIS), 2017 - koreascience.kr
Finite field arithmetic over GF ($2^ m $) is used in a variety of applications such as
cryptography, coding theory, computer algebra. It is mainly used in various cryptographic …

Low-latency area-efficient systolic bit-parallel GF (2m) multiplier for a narrow class of trinomials

SR Pillutla, L Boppana - Microelectronics Journal, 2021 - Elsevier
Edge computing in Internet of Things (IoT) requires high-performance as well as cost-
effective hardware implementations to accommodate large number of computations …