Design and analysis of 1-bit hybrid full adder cells for fast computation
A Anand, S Dhariwal, VK Lamba… - International Journal of …, 2024 - Taylor & Francis
This research article introduces a 1-bit Full Adder (FA) cell comprising 20 transistors,
employing Gate Diffusion Input (GDI) and transmission gate logic. The FA cell is segmented …
employing Gate Diffusion Input (GDI) and transmission gate logic. The FA cell is segmented …
Optimizing the 12T Hybrid 1-Bit Full Adder Circuit for Low Energy Applications
This paper introduces a novel design for a 1-bit 12T full adder, utilizing a hybrid approach.
The design was implemented using Cadence Virtuoso software with 90-nm technology. The …
The design was implemented using Cadence Virtuoso software with 90-nm technology. The …
Design and Implementation of High Frequency 16-bit full adder on FPGA Families
P Puneeth, AS Raghuvanshi… - 2023 4th International …, 2023 - ieeexplore.ieee.org
An adder serves as the main structural component of any contemporary ALU-based
processor. It is known that addition is a very fundamental operation that is utilized in almost …
processor. It is known that addition is a very fundamental operation that is utilized in almost …
An innovative hybrid full adder design for low-power VLSI circuit applications
This research introduces an innovative Hybrid Full Adder (HFA) configuration integrating
Pass Transistor Logic (PTL), Complementary Metal-Oxide-Semiconductor (CMOS) logic …
Pass Transistor Logic (PTL), Complementary Metal-Oxide-Semiconductor (CMOS) logic …
Analysis of CMOS Full Adder Circuits for Multiplier Logic Architectures
JG Reddy, KL Krishna, JP Keerthi… - 2024 International …, 2024 - ieeexplore.ieee.org
High efficient digital adder logic circuits are very essential and critical modules in the
processor and controller architectures. For example, an adder circuit in an arithmetic logic …
processor and controller architectures. For example, an adder circuit in an arithmetic logic …