Integrated circuit design flow with layout-dependent effects
MJ Huang, YS Jiang, CW Chen - US Patent 8,775,993, 2014 - Google Patents
BACKGROUND In an integrated circuit design process, a circuit Schematic of an integrated
circuit being designed is generated first, for example, in a schematic editor. A pre-layout …
circuit being designed is generated first, for example, in a schematic editor. A pre-layout …
Integrated circuits having in-situ constraints
QD Qian - US Patent 10,216,890, 2019 - Google Patents
In accordance with the present method and system for improving integrated circuit layout, a
local process modification is calculated from simulated process response variables at a set …
local process modification is calculated from simulated process response variables at a set …
Layout of large block synthesis blocks in integrated circuits
H Barowski, HD Folberth, J Keinert, S Saha - US Patent 9,910,948, 2018 - Google Patents
Generating a layout of an integrated circuit chip area from a description of an integrated
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
Alignment net insertion for straightening the datapath in a force-directed placer
An automated method for aligning a critical datapath in an integrated circuit design inserts
an artificial alignment net in the netlist which interconnects all cells in the bit stack of the …
an artificial alignment net in the netlist which interconnects all cells in the bit stack of the …
Layout of large block synthesis blocks in integrated circuits
H Barowski, HD Folberth, J Keinert, S Saha - US Patent 10,534,884, 2020 - Google Patents
Generating a layout of an integrated circuit chip area from a description of an integrated
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
Layout of large block synthesis blocks in integrated circuits
H Barowski, HD Folberth, J Keinert, S Saha - US Patent 9,928,329, 2018 - Google Patents
Generating a layout of an integrated circuit chip area from a description of an integrated
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
Element placement in circuit design based on preferred location
BACKGROUND The disclosure relates to the field of computer systems, and, more
particularly, to a computer system for improving circuit designs. During the very-large-scale …
particularly, to a computer system for improving circuit designs. During the very-large-scale …
Integrated circuit design system
MJ Huang, YS Jiang, CW Chen - US Patent 9,245,078, 2016 - Google Patents
(57) ABSTRACT A design system for designing an integrated circuit, and the design system
includes a processor and a computer readable medium embodying computer program code …
includes a processor and a computer readable medium embodying computer program code …
Layout of large block synthesis blocks in integrated circuits
H Barowski, HD Folberth, J Keinert, S Saha - US Patent 10,242,140, 2019 - Google Patents
Generating a layout of an integrated circuit chip area from a description of an integrated
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
Layout of large block synthesis blocks in integrated circuits
H Barowski, HD Folberth, J Keinert, S Saha - US Patent 10,235,487, 2019 - Google Patents
Generating a layout of an integrated circuit chip area from a description of an integrated
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …
circuit (IC). The description includes a register-transfer-level (RTL) design. The RTL design …