A time-interleaved digital-to-analog converter up to 118 GS/s with integrated analog multiplexer in 28-nm FD-SOI CMOS technology

D Widmann, T Tannert, XQ Du, T Veigel… - IEEE Journal of Solid …, 2023 - ieeexplore.ieee.org
To enhance sampling rates of CMOS digital-to-analog converters (DACs), analog
multiplexing of several DAC output signals in the time domain provides a solution. In this …

The role of analog signal processing in upcoming telecommunication systems: Concept, challenges, and outlook

MM Safari, J Pourrostam - Signal Processing, 2024 - Elsevier
With the increasing demands in modern communications, the concepts of energy-efficient
and low-cost processors have received a lot of attention from researchers in recent years …

Learning Energy-Efficient Transmitter Configurations for Massive MIMO Beamforming

H Hojatian, Z Mlika, J Nadal, JF Frigon… - … Machine Learning in …, 2024 - ieeexplore.ieee.org
Hybrid beamforming (HBF) and antenna selection are promising techniques for improving
the energy efficiency (EE) of massive multiple-input multiple-output (mMIMO) systems …

A 16-Bit 4.0-GS/s Calibration-Free 65 nm DAC Achieving> 70 dBc SFDR and<− 80 dBc IM3 Up to 1 GHz With Enhanced Constant-Switching-Activity Data-Weighted …

Y Fu, C Huang, L Lai, N Sun, X Li… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
This paper presents an approach to the mitigation of harmonic distortions in wideband
current-steering digital-to-analog converters (DACs). This approach enables code …

A 48-dB SFDR, 43-dB SNDR, 50-GS/s 9-b 2×-Interleaved Nyquist DAC in Intel 16

H Chandrakumar, TW Brown, D Frolov… - IEEE Solid-State …, 2022 - ieeexplore.ieee.org
This work presents a 9-b 50-GS/s digital-to-analog converter (DAC) built in Intel 16 which
combines-interleaving with improvements in the current steering cell and high-speed clock …

Analog Multiplexer for Performance Enhancement of Digital-to-Analog Converters and Experimental 2-to-1 Time Interleaving in 28-nm FD-SOI CMOS

D Widmann, T Tannert, M Grözing… - IEEE Solid-State …, 2023 - ieeexplore.ieee.org
To enhance the performance of digital-to-analog converters (DACs), time interleaving by an
analog multiplexer (AMUX) provides a powerful concept. Next to an increased sampling …

Learning Energy-Efficient Hardware Configurations for Massive MIMO Beamforming

H Hojatian, Z Mlika, J Nadal, JF Frigon… - arXiv preprint arXiv …, 2023 - arxiv.org
Hybrid beamforming (HBF) and antenna selection are promising techniques for improving
the energy efficiency~(EE) of massive multiple-input multiple-output~(mMIMO) systems …

Analysis and calibration for wideband times-2 interleaved current-steering DACs

D Beauchamp, KM Chugg - … on Circuits and Systems I: Regular …, 2022 - ieeexplore.ieee.org
This work presents analysis and calibration of interleaving and data timing errors that are
encountered in modern times-2 interleaved digital-to-analog converters (DACs) with a …

A 28nm 8-Bit 16-GS/DAC With> 60dBc/> 40dBcSFDR up to 2.3 GHz/5.4 GHz Using 4-Channel NRZ-Output-Overlapped Time-Interleaving

S Chen, C Huang, L Sun, Y Liu, W Tang… - … on Circuits and …, 2024 - ieeexplore.ieee.org
This paper validates in silicon a four-channel nonreturn-to-zero (NRZ) output-overlapped
(OO) time-interleaving (TI) digital-to-analog converter (DAC) for the first time. The proposed …

A Low-Power 10-Bit 2GS/s Hybrid Time-Interleaved Digital-to-Analog Converter with a New Neutrolized-Glitch Unit Current Cell in 65 nm CMOS Technology

R Ghasemi, MA Karami - Circuits, Systems, and Signal Processing, 2024 - Springer
This work presents a novel 10-bit 2GS/s time-interleaved digital-to-analog converter (TI-
DAC). The presented TI-DAC benefits from a combination of two 1 GHz hybrid sub-DACs …