[图书][B] Custom memory management methodology: Exploration of memory organisation for embedded multimedia system design

F Catthoor, S Wuytack, GE De Greef, F Banica… - 2013 - books.google.com
The main intention of this book is to give an impression of the state-of-the-art in system-level
memory management (data transfer and storage) related issues for complex data-dominated …

Power optimization of variable voltage core-based systems

I Hong, D Kirovski, G Qu, M Potkonjak… - Proceedings of the 35th …, 1998 - dl.acm.org
The growing class of portable systems, such as personal computing and communication
devices, has resulted in a new set of system design requirements, mainly characterized by …

Efficient utilization of scratch-pad memory in embedded processor applications

PR Panda, ND Dutt, A Nicolau - … and Test Conference. ED & TC …, 1997 - ieeexplore.ieee.org
Efficient utilization of on-chip memory space is extremely important in modern embedded
system applications based on microprocessor cores. In addition to a data cache that …

On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems

PR Panda, ND Dutt, A Nicolau - ACM Transactions on Design …, 2000 - dl.acm.org
Efficient utilization of on-chip memory space is extremely important in modern embedded
system applications based on processor cores. In addition to a data cache that interfaces …

[图书][B] Hardware/software co-design: principles and practice

J Staunstrup, W Wolf - 2013 - books.google.com
Introduction to Hardware-Software Co-Design presents a number of issues of fundamental
importance for the design of integrated hardware software products such as embedded …

[图书][B] Data access and storage management for embedded programmable processors

F Catthoor, K Danckaert - 2002 - books.google.com
Data Access and Storage Management for Embedded Programmable Processors gives an
overview of the state-of-the-art in system-level data access and storage management for …

Formalized methodology for data reuse: exploration for low-power hierarchical memory mappings

S Wuytack, JP Diguet, FVM Catthoor… - IEEE Transactions on …, 1998 - ieeexplore.ieee.org
Efficient use of an optimized custom memory hierarchy to exploit temporal locality in the data
accesses can have a very large impact on the power consumption in data dominated …

High-performance and low-power memory-interface architecture for video processing applications

H Kim, IC Park - IEEE Transactions on Circuits and systems for …, 2001 - ieeexplore.ieee.org
To improve memory bandwidth and power consumption in video applications, a new
memory-interface architecture is proposed. The architecture adopts an array address …

Local memory exploration and optimization in embedded systems

PR Panda, ND Dutt, A Nicolau - IEEE Transactions on …, 1999 - ieeexplore.ieee.org
Embedded processor-based systems allow for the tailoring of the on-chip memory
architecture based on application specific requirements. We present an analytical strategy …

Loop optimization with mapping code on an architecture

K Danckaert, F Catthoor - US Patent 6,772,415, 2004 - Google Patents
A loop transformation step, to be performed on code and improving data transfer and
storage, while executing said transformed code on a parallel processor, is disclosed …