Analytical fault tolerance assessment and metrics for TSV-based 3D network-on-chip

A Eghbal, PM Yaghini, N Bagherzadeh… - IEEE Transactions …, 2015 - ieeexplore.ieee.org
Reliability is one of the most challenging problems in the context of three-dimensional
network-on-chip (3D NoC) systems. Reliability analysis is prominent for early stages of the …

A fast, flexible, and easy-to-develop FPGA-based fault injection technique

M Ebrahimi, A Mohammadi, A Ejlali… - Microelectronics …, 2014 - Elsevier
By technology down scaling in nowadays digital circuits, their sensitivity to radiation effects
increases, making the occurrence of soft errors more probable. As a consequence, soft error …

Computing reliability: On the differences between software testing and software fault injection techniques

M Kooli, F Kaddachi, G Di Natale, A Bosio… - Microprocessors and …, 2017 - Elsevier
Abstract System reliability has become a main concern during the computer-based system
design process. It is one of the most important characteristics of the system quality. The …

A cross-layer SER analysis in the presence of PVTA variations

B Farahani, S Habibi, S Safari - Microelectronics Reliability, 2015 - Elsevier
As the technology scaling enters into the nanoscale regime, soft errors become one of the
major challenging issues for VLSI chips. Susceptibility to soft error is even becoming more …

Adding temporal redundancy to delay insensitive codes to mitigate single event effects

J Pontes, N Calazans, P Vivet - 2012 IEEE 18th International …, 2012 - ieeexplore.ieee.org
In advanced CMOS technology, Single Event Effects due to high energy particle may cause
different types of electrical effects when crossing silicon: from small delay variations, to bit …

Modeling the Effect of SEUs on the Configuration Memory of SRAM-FPGA based CNN Accelerators

Z Gao, J Feng, S Gao, Q Liu, G Ge… - IEEE Journal on …, 2024 - ieeexplore.ieee.org
Convolutional Neural Networks (CNNs) are widely used in computer vision applications.
SRAM based Field Programmable Gate Arrays (SRAM-FPGAs) are popular for the …

A Survey of fault models and fault tolerance methods for 2D bus-based multi-core systems and TSV based 3D NOC many-core systems

S Venkatesha, R Parthasarathi - arXiv preprint arXiv:2203.07830, 2022 - arxiv.org
Reliability has taken centre stage in the development of high-performance computing
processors. A Surge of interest is noticeable in recent times in formulating fault and failure …

A methodology for characterization, modeling and mitigation of single event transient effects in CMOS standard combinational cells

M Andjelkovic - 2021 - publishup.uni-potsdam.de
With the downscaling of CMOS technologies, the radiation-induced Single Event Transient
(SET) effects in combinational logic have become a critical reliability issue for modern …

Cache-aware reliability evaluation through LLVM-based analysis and fault injection

M Kooli, G Di Natale, A Bosio - … on On-Line Testing and Robust …, 2016 - ieeexplore.ieee.org
Reliability evaluation is a high costly process that is mainly carried out through fault injection
or by means of analytical techniques. While the analytical techniques are fast but inaccurate …

System-level reliability evaluation through cache-aware software-based fault injection

F Kaddachi, M Kooli, G Di Natale… - 2016 IEEE 19th …, 2016 - ieeexplore.ieee.org
Developing new methods to evaluate the software reliability in an early design stage of the
system can save the design costs and efforts, and will positively impact the product time-to …