AetEC: Adaptive error-tolerant erasure coding scheme within SSDs

T Zhan, X Wang, D Feng, W Tong - 2020 IEEE 38th …, 2020 - ieeexplore.ieee.org
Flash memory-based SSDs are popular across a wide range of data storage markets, while
the flash memory as a storage medium is becoming increasingly unreliable. To improve …

Cost-effectively improving life endurance of MLC NAND flash SSDs via hierarchical data redundancy and heterogeneous flash memory

S Tan, R Yu, S Wan, Q Cao - 2015 IEEE International …, 2015 - ieeexplore.ieee.org
As an alternative to conventional spinning HDDs, MLC NAND flash memory based SSDs
suffer from a low life endurance. To cost-effectively address this problem, we propose …

Cost‐effectively improving solid state drive lifetime by hierarchical redundancy and heterogeneous memories

B Zhou, S Tan, R Yu, S Wan… - … and Computation: Practice …, 2022 - Wiley Online Library
Solid state drives (SSDs) built upon MLC NAND flash memories suffer from a low lifetime
endurance induced by continuously scaling‐down feature sizes and increasing bit density …

System and method for data protection in solid-state drives

S Li - US Patent 11,789,814, 2023 - Google Patents
The present disclosure relates to a system and a method for data protection. In some
embodiments, an exemplary method for data encoding includes: receiving a data bulk; …

Coordinated error correction

SE Schaefer, AP Boehm - US Patent 11,789,818, 2023 - Google Patents
Methods, systems, and devices for coordinated error correction are described. A memory
device indicates, to an external device, that errors were detected in data that was stored by …

Storage device and operating method of storage device

CHO Yongwon, BAE Hyunsoo, H Leem… - US Patent …, 2020 - Google Patents
A storage device includes a nonvolatile memory device and a controller configured to read
data from the nonvolatile memory device, to divide the read data into a plurality of segments …