Global and local consistent age generative adversarial networks

P Li, Y Hu, Q Li, R He, Z Sun - 2018 24th International …, 2018 - ieeexplore.ieee.org
Age progression/regression is a challenging task due to the complicated and non-linear
transformation in human aging process. Many researches have shown that both global and …

Deep models for phonocardiography (PCG) classification

VG Sujadevi, KP Soman… - 2017 international …, 2017 - ieeexplore.ieee.org
Phonocardiography or PCG plays a vital role in the initial diagnostic screenings of subjects
for evaluating the presence of cardio-vascular anomalies. Since it is low-cost and less …

Improved ant colony algorithm based on task scale in network on chip (NoC) mapping

J Fang, T Yu, Z Wei - Electronics, 2019 - mdpi.com
Multi-core processors integrate with multiple computing units on one chip. This technology is
increasingly mature, and communication between cores has become the largest research …

Noco: Ilp-based worst-case contention estimation for mesh real-time manycores

J Cardona, C Hernandez, E Mezzetti… - 2018 IEEE Real …, 2018 - ieeexplore.ieee.org
Manycores are capable of providing the computational demands required by functionally-
advanced critical applications in domains such as automotive and avionics. In manycores a …

Practical strategies to monitor and control contention in shared resources of critical real-time embedded systems

J Cardona Nadal - 2023 - upcommons.upc.edu
(English) In the last decade performance needs in Critical Real-Time Embedded Systems
(CRTES) domains like automotive, avionics, railway or space have been steadily on the rise …

Computing worst-case contention delays for networks on chip

J Cardona, C Hernandez, J Abella Ferrer - 2020 - upcommons.upc.edu
Computing performance needs in domains such as automotive, avionics, railway, and space
are on the rise. This is fueled by the trend towards implementing an increasing number of …

[PDF][PDF] A Brief Resume

F Mueller - arcb.csc.ncsu.edu
Publications Career Total (NCSU+ HUB) 1/1/18-12/31/18 Total Total moving PTR Period
Submitted edited books 11 1 5 ref. journals 40 2 14 1 ref. conferences 131 8 47 5 ref …

Evaluation of Memory Access Arbitration Algorithm on Tilera's TILEPro64 Platform

M Shekhar, H Ramaprasad… - 2015 IEEE 17th …, 2015 - ieeexplore.ieee.org
As real-time embedded systems demand more and more computing power under
reasonable energy budgets, multi-core platforms are a viable option. However, deploying …

[图书][B] Architecture-aware hard-real-time scheduling on multi-core architectures

M Shekhar - 2014 - search.proquest.com
The increasing dependency of man on machines have led to increase computational load
on systems. The increasing computational load can be handled to some extent by scaling up …

[引用][C] Evaluation of Memory Access Arbitration Algorithm on Tilera's TILEPro64 platform

NC Charlotte