Survey on Redundancy Based-Fault tolerance methods for Processors and Hardware accelerators-Trends in Quantum Computing, Heterogeneous Systems and …
S Venkatesha, R Parthasarathi - ACM Computing Surveys, 2024 - dl.acm.org
Rapid progress in the CMOS technology for the past 25 years has increased the
vulnerability of processors towards faults. Subsequently, focus of computer architects shifted …
vulnerability of processors towards faults. Subsequently, focus of computer architects shifted …
Tiny but mighty: designing and realizing scalable latency tolerance for manycore SoCs
Modern computing systems employ significant heterogeneity and specialization to meet
performance targets at manageable power. However, memory latency bottlenecks remain …
performance targets at manageable power. However, memory latency bottlenecks remain …
Cheshire: A lightweight, linux-capable risc-v host platform for domain-specific accelerator plug-in
Power and cost constraints in the Internet-of-Things (IoT) extreme-edge and TinyML
domains, coupled with increasing performance requirements, motivate a trend toward …
domains, coupled with increasing performance requirements, motivate a trend toward …
A script-based cycle-true verification framework to speed-up hardware and software co-design: Performance evaluation on ecc accelerator use-case
Digital designs complexity has exponentially increased in the last decades. Heterogeneous
Systems-on-Chip integrate many different hardware components which require a reliable …
Systems-on-Chip integrate many different hardware components which require a reliable …
AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware
Covert channels enable information leakage between security domains that should be
isolated by observing execution differences in shared hardware. These channels can …
isolated by observing execution differences in shared hardware. These channels can …
Cohort: Software-oriented acceleration for heterogeneous socs
Philosophically, our approaches to acceleration focus on the extreme. We must optimise
accelerators to the maximum, leaving software to fix any hardware-software mismatches …
accelerators to the maximum, leaving software to fix any hardware-software mismatches …
HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC
IoT applications span a wide range in performance and memory footprint, under tight cost
and power constraints. High-end applications rely on power-hungry Systems-on-Chip …
and power constraints. High-end applications rely on power-hungry Systems-on-Chip …
Supply chain aware computer architecture
Progressively and increasingly, our society has become more and more dependent on
semiconductors and semiconductor-enabled products and services. The importance of chips …
semiconductors and semiconductor-enabled products and services. The importance of chips …
Fast behavioural rtl simulation of 10b transistor soc designs with metro-mpi
G López-Paradís, B Li, A Armejach… - … , Automation & Test …, 2023 - ieeexplore.ieee.org
Chips with tens of billions of transistors have become today's norm. These designs are
straining our electronic design automation tools throughout the design process, requiring …
straining our electronic design automation tools throughout the design process, requiring …
SMAPPIC: Scalable multi-FPGA architecture prototype platform in the cloud
G Chirkov, D Wentzlaff - Proceedings of the 28th ACM International …, 2023 - dl.acm.org
Traditionally, architecture prototypes are built on top of FPGA infrastructure, with two
associated problems. First, very large FPGAs are prohibitively expensive for most people …
associated problems. First, very large FPGAs are prohibitively expensive for most people …