A variation-aware design for storage cells using Schottky-barrier-type GNRFETs

E Abbasian, M Gholipour - Journal of Computational Electronics, 2020 - Springer
Graphene nanoribbons (GNRs) are a good replacement material for silicon to overcome
short-channel effects in nanoscale devices. However, with continuous technology scaling …

Design and implementation of CNFET SRAM cells by using multi-threshold technique

S Kavitha, C Kumar, HH Fayek, E Rusu - Electronics, 2023 - mdpi.com
This paper presents a CNFET (Carbon Nano-tube FET) based MT (Multi-Threshold)-SRAM
(Static Random Access Memory) design based on the leakage reduction mechanism. A …

A novel charge recycle read write assist technique for energy efficient and fast 20 nm 8T-SRAM array

D Nayak, DP Acharya, PK Rout, U Nanda - Solid-State Electronics, 2018 - Elsevier
The read instability of conventional 6T-SRAM cell has made the 8T-SRAM cell a substitute
for high data reliability. But the single ended nature of read operation demands a complete V …

Performance evaluation of double gate tunnel FET based chain of inverters and 6-T SRAM cell

D Kumar - Engineering Research Express, 2019 - iopscience.iop.org
In this work, a Lookup table based verilog-A model is employed in cadence to evaluate the
performance of the chain of inverters and 6-T SRAM cell based on double gate Tunnel-field …

An improved energy efficient SRAM cell for access over a wide frequency range

D Nayak, DP Acharya, K Mahapatra - Solid-state electronics, 2016 - Elsevier
Leakage current contribution to the power consumption cannot be ignored in the sub-100
nm technology. Drastic reduction of channel length of the modern highly scaled device …

A novel indirect read technique based SRAM with ability to charge recycle and differential read for low power consumption, high stability and performance

D Nayak, PK Rout, S Sahu, DP Acharya, U Nanda… - Microelectronics …, 2020 - Elsevier
Read noise insertion problem of conventional read method of 6T-SRAM cell has forced to
think about indirect read. Indirect read though eliminates read noise insertion but also take …

Stability analysis of SRAM cell using CNT and GNR field effect transistors

P Singh, R Chandel, N Sharma - 2017 Tenth International …, 2017 - ieeexplore.ieee.org
In modern technologies, read stability and write ability have become major concerns in nano
regime for static random access memory (SRAM) cell. This paper provides the stability …

Design and implementaton of SRAM macro unit

SN Panda, S Padhi, V Phanindra… - … on Trends in …, 2017 - ieeexplore.ieee.org
The topic SRAM Macro basically explains the memory unit associated with any processor.
Here Macro signifies that the explanation will not only contain the memory unit but also …

Power efficient design of a novel SRAM cell with higher write ability

D Nayak, DP Acharya… - 2015 Annual IEEE India …, 2015 - ieeexplore.ieee.org
The modern high-performance portable communication devices are the key to make the
world more inclusive than before. There is a great demand for high-performance SOC inside …

Design of low power stacked inverter based sram cell with improved write ability

D Chaudhary, V Muppalla… - 2020 IEEE Region 10 …, 2020 - ieeexplore.ieee.org
This paper puts forth double ended low power static random access memory (SRAM) cell
structure that uses low power stacked inverters to reduce the power dissipation. The power …