Ferroelectric devices for content-addressable memory
M Tarkov, F Tikhonenko, V Popov, V Antonov… - Nanomaterials, 2022 - mdpi.com
In-memory computing is an attractive solution for reducing power consumption and memory
access latency cost by performing certain computations directly in memory without reading …
access latency cost by performing certain computations directly in memory without reading …
Disturb-free operations of multilevel cell ferroelectric FETs for NAND applications
C Jin, J Xu, J Gu, J Zhao, X Jia, J Chen… - … on Electron Devices, 2023 - ieeexplore.ieee.org
We have experimentally investigated disturb-free operations of multilevel cell (MLC)
ferroelectric field-effect transistors (FeFETs) in a NAND array. The fabricated FeFET cells are …
ferroelectric field-effect transistors (FeFETs) in a NAND array. The fabricated FeFET cells are …
A multi-bit CAM design with ultra-high density and energy efficiency based on FeFET NAND
C Jin, J Xu, J Zhao, J Gu, J Chen, H Liu… - IEEE Electron …, 2023 - ieeexplore.ieee.org
We have proposed and experimentally demonstrated a novel multi-bit content addressable
memory (CAM) cell based on two series connected ferroelectric FETs (FeFETs). Thanks to …
memory (CAM) cell based on two series connected ferroelectric FETs (FeFETs). Thanks to …
Insights into device and material origins and physical mechanisms behind cross temperature in 3D NAND
Continuation of the scaling and increase of the storage density of the 3D NAND requires
minimization and control of variability sources. Among the various reliability challenges …
minimization and control of variability sources. Among the various reliability challenges …
Highly Robust All-Oxide Transistors Toward Vertical Logic and Memory
In this work, we report atomic-layer-deposited (ALD) based all-oxide transistors toward
vertically stacked high-density logic and memory for 3-D integration. This structure utilizes …
vertically stacked high-density logic and memory for 3-D integration. This structure utilizes …
Revealing the role of Σ3 {112} Si grain boundary local structures in impurity segregation
The interfacial structure of a silicon grain boundary (Si-GB) plays a decisive role on its
chemical functionalization and has implications in diverse physical–chemical properties of …
chemical functionalization and has implications in diverse physical–chemical properties of …
Low-PBTS defect-engineered high-mobility metal-oxide BEOL transistors
B Bcltrando, B Coppolelli, JB Kim… - 2024 IEEE …, 2024 - ieeexplore.ieee.org
In this work we develop an ALD grown IGZO channel material and integrate it into a double-
gated transistor test vehicle. We analyze physical mechanism and device reliability …
gated transistor test vehicle. We analyze physical mechanism and device reliability …
Blocking Oxide Material Engineering to Improve Retention Loss in 3D NAND: a Modeling Process Optimization Study
T Rollo, H Lo, L Larcher, C Olsen… - 2024 IEEE International …, 2024 - ieeexplore.ieee.org
In this work we develop a retention model of 3D NAND and:(1) show importance of the
blocking oxide quality improvement (defect engineering) and lateral migration suppression …
blocking oxide quality improvement (defect engineering) and lateral migration suppression …
A Multiscale-Multiphysics simulation platform for technology virtualization: from process chamber modeling to device electrical prediction
Acceleration is mandatory at both unit and process integration levels to save cost and
reduce time to market. In this scenario, modeling and simulation can offer unprecedented …
reduce time to market. In this scenario, modeling and simulation can offer unprecedented …