Composite hard mask with upper sacrificial dielectric layer for the patterning and etching of nanometer size MRAM devices
R Belen, R Xiao, T Zhong, W Kula, CJ Torng - US Patent 8,722,543, 2014 - Google Patents
(57) ABSTRACT A composite hard mask is disclosed that prevents build up of metal etch
residue in a MRAM device during etch processes that define an MTJ shape. As a result, MTJ …
residue in a MRAM device during etch processes that define an MTJ shape. As a result, MTJ …
Combined physical and chemical etch to reduce magnetic tunnel junction (MTJ) sidewall damage
D Shen, YJ Wang, RY Tong, V Sundar… - US Patent 10,522,749, 2019 - Google Patents
BACKGROUND A MTJ memory elementis also referred to as a MTJ nanopilarandis a key
componentin magnetic recording devices, andin memory devices Such as magnetoresistive …
componentin magnetic recording devices, andin memory devices Such as magnetoresistive …
Etch selectivity by introducing oxidants to noble gas during physical magnetic tunnel junction (MTJ) etching
D Shen, YJ Wang - US Patent 10,043,851, 2018 - Google Patents
A process flow for forming magnetic tunnel junction (MTJ) nanopillars with minimal sidewall
residue and damage is disclosed wherein a pattern is first formed in a hard mask or …
residue and damage is disclosed wherein a pattern is first formed in a hard mask or …
Giant spin hall-based compact neuromorphic cell optimized for differential read inference
T Rakshit, R Hatcher, JA Kittl - US Patent 10,790,002, 2020 - Google Patents
A non-volatile data retention circuit includes a complementary latch configured to generate
and store complementary non-volatile spin states corresponding to an input signal when in a …
and store complementary non-volatile spin states corresponding to an input signal when in a …
Multi-level memory cell using multiple magnetic tunnel junctions with varying MGO thickness
K Lee, T Kim, JP Kim, SH Kang - US Patent 9,047,964, 2015 - Google Patents
BACKGROUND Magnetic Random Access Memory (MRAM) is non-vola tile memory in
which data is stored by programming a Mag netic Tunnel Junction (MTJ). MRAM is …
which data is stored by programming a Mag netic Tunnel Junction (MTJ). MRAM is …
Logic chip including embedded magnetic tunnel junctions
KJ Lee, T Ghani, JM Steigerwald, JH Epple… - US Patent …, 2017 - Google Patents
US9660181B2 - Logic chip including embedded magnetic tunnel junctions - Google Patents
US9660181B2 - Logic chip including embedded magnetic tunnel junctions - Google Patents …
US9660181B2 - Logic chip including embedded magnetic tunnel junctions - Google Patents …
MRAM device and fabrication method thereof
FT Sung, SC Liu, CS Tsai - US Patent 8,921,959, 2014 - Google Patents
According to an embodiment, a magnetoresistive random access memory (MRAM) device
comprises a bottom electrode, a stack, a dielectric material, a dielectric layer, and a …
comprises a bottom electrode, a stack, a dielectric material, a dielectric layer, and a …
Configurable memory interface to provide serial and parallel access to memories
R Norman - US Patent App. 12/587,841, 2010 - Google Patents
The invention relates to an interface for providing multiple modes of accessing data,
including serial and parallel modes. Controllable non-volatile memory interfaces are …
including serial and parallel modes. Controllable non-volatile memory interfaces are …
Spin transfer torque cell for magnetic random access memory
Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device
includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive …
includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive …
Method for forming III-V semiconductor structures including aluminum-silicon nitride passivation
JR Shealy, R Brown - US Patent 9,991,360, 2018 - Google Patents
A method for fabricating a semiconductor structure includes forming a semiconductor layer
over a substrate and forming an aluminum-silicon nitride layer upon the semiconductor …
over a substrate and forming an aluminum-silicon nitride layer upon the semiconductor …