A survey of timing verification techniques for multi-core real-time systems
This survey provides an overview of the scientific literature on timing verification techniques
for multi-core real-time systems. It reviews the key results in the field from its origins around …
for multi-core real-time systems. It reviews the key results in the field from its origins around …
Heterogeneous MPSoCs for mixed criticality systems: Challenges and opportunities
M Hassan - arXiv preprint arXiv:1706.07429, 2017 - arxiv.org
Due to their cost, performance, area, and energy efficiency, MPSoCs offer appealing
architecture for emerging mixed criticality systems (MCS) such as driverless cars, smart …
architecture for emerging mixed criticality systems (MCS) such as driverless cars, smart …
Worst case delay analysis for memory interference in multicore systems
R Pellizzoni, A Schranzhofer, JJ Chen… - … , Automation & Test …, 2010 - ieeexplore.ieee.org
Employing COTS components in real-time embedded systems leads to timing challenges.
When multiple CPU cores and DMA peripherals run simultaneously, contention for access to …
When multiple CPU cores and DMA peripherals run simultaneously, contention for access to …
Memory-centric scheduling for multicore hard real-time systems
Memory resources are a serious bottleneck in many real-time multicore systems. Previous
work has shown that, in the worst case, execution time of memory intensive tasks can grow …
work has shown that, in the worst case, execution time of memory intensive tasks can grow …
Scheduling of mixed-criticality applications on resource-sharing multicore systems
G Giannopoulou, N Stoimenov… - 2013 Proceedings of …, 2013 - ieeexplore.ieee.org
A common trend in real-time safety-critical embedded systems is to integrate multiple
applications on a single platform. Such systems are known as mixed-criticality (MC) systems …
applications on a single platform. Such systems are known as mixed-criticality (MC) systems …
Timing analysis for TDMA arbitration in resource sharing systems
A Schranzhofer, JJ Chen… - 2010 16th IEEE Real-Time …, 2010 - ieeexplore.ieee.org
Modern computing systems have adopted multicore architectures and multiprocessor
systems on chip (MPSoCs) for accommodating the increasing demand on computation …
systems on chip (MPSoCs) for accommodating the increasing demand on computation …
Leveraging hardware QoS to control contention in the Xilinx Zynq UltraScale+ MPSoC
A Serrano Cases, JM Reina… - … Conference on Real …, 2021 - upcommons.upc.edu
The interference co-running tasks generate on each other's timing behavior continues to be
one of the main challenges to be addressed before Multi-Processor System-on-Chip …
one of the main challenges to be addressed before Multi-Processor System-on-Chip …
Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms
Motivated by the increasing number of embedded applications that make use of traffic‐
intensive I/O devices, this work studies the memory contention generated by I/O devices and …
intensive I/O devices, this work studies the memory contention generated by I/O devices and …
Optimal selection of preemption points to minimize preemption overhead
M Bertogna, O Xhani, M Marinoni… - 2011 23rd Euromicro …, 2011 - ieeexplore.ieee.org
A central issue for verifying the schedulability of hard real-time systems is the correct
evaluation of task execution times. These values are significantly influenced by the …
evaluation of task execution times. These values are significantly influenced by the …
Mixed-criticality scheduling on cluster-based manycores with shared communication and storage resources
The embedded system industry is facing an increasing pressure for migrating from single-
core to multi-and many-core platforms for size, performance and cost purposes. Real-time …
core to multi-and many-core platforms for size, performance and cost purposes. Real-time …