Design and evaluation of approximate logarithmic multipliers for low power error-tolerant applications

W Liu, J Xu, D Wang, C Wang… - … on Circuits and …, 2018 - ieeexplore.ieee.org
In this paper, the designs of both non-iterative and iterative approximate logarithmic
multipliers (ALMs) are studied to further reduce power consumption and improve …

Computing with logarithmic number system arithmetic: Implementation methods and performance benefits

B Parhami - Computers & Electrical Engineering, 2020 - Elsevier
The logarithmic number system (LNS) has found appeal in digital arithmetic because it
allows multiplication and division to be performed much faster and more accurately than with …

A universal method of linear approximation with controllable error for the efficient implementation of transcendental functions

H Sun, Y Luo, Y Ha, Y Shi, Y Gao… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Transcendental functions are commonly used in many fields such as nonlinear functions of
artificial neural networks (ANNs). Due to nonlinearity of these functions, hardware …

Ultralow-Latency VLSI Architecture Based on a Linear Approximation Method for Computing Nth Roots of Floating-Point Numbers

F Lyu, X Xu, Y Wang, Y Luo, Y Wang… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
State-of-the-art approaches that perform root computations based on the COordinate
Rotation Digital Computer (CORDIC) algorithm suffer from high latency in performing …

Unified Mitchell-based approximation for efficient logarithmic conversion circuit

JYL Low, CC Jong - IEEE Transactions on Computers, 2014 - ieeexplore.ieee.org
This paper presents a novel method named the Unified Mitchell-based Approximation
(UMA) to obtain an optimized Mitchell-based logarithmic conversion circuit for any desired …

Hyperbolic CORDIC-based architecture for computing logarithm and its implementation

H Chen, K Cheng, Z Lu, Y Fu… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
We present a CORDIC (Coordinate Rotation Digital Computer)-based method to compute
the logarithm function with base 2 and validate this method by software simulation and …

A low-error, cost-efficient design procedure for evaluating logarithms to be used in a logarithmic arithmetic processor

CW Liu, SH Ou, KC Chang, TC Lin… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
Based on an error-flattened, non-uniform-region linear-approximation algorithm, this brief
proposes a low-error and a cost-efficient design procedure for realizing an optimized shift …

Auto-LUT: Auto Approximation of Non-Linear Operations for Neural Networks on FPGA

H Lu, Q Mei, K Wang - 2023 IEEE International Symposium on …, 2023 - ieeexplore.ieee.org
The approximation of non-linear operation can simplify the logic design and save the system
resources during the neural network inference on Field-Programmable Gate Array (FPGA) …

A method for calculating the derivative of activation functions based on piecewise linear approximation

X Liao, T Zhou, L Zhang, X Hu, Y Peng - Electronics, 2023 - mdpi.com
Nonlinear functions are widely used as activation functions in artificial neural networks,
which have a great impact on the fitting ability of artificial neural networks. Due to the …

ML-PLAC: Multiplierless piecewise linear approximation for nonlinear function evaluation

F Lyu, Y Xia, Z Mao, Y Wang, Y Wang… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
In this article, we propose a multiplierless piecewise linear (PWL) approximation
computation (ML-PLAC) method for nonlinear unary functions. ML-PLAC seeks the minimum …