Practical Problems in VLSI Physical Design Automation contains problems and solutions
related to various well-known algorithms used in VLSI physical design automation. Dr. Lim …

In this paper we introduce to virtualization of hardware on reconfigurable devices. We
identify three main approaches denoted with temporal partitioning, virtualized execution …

FPGA-based configurable computing machines are evolving rapidly in large signal
processing applications due to flexibility and high performance. In this paper, given a …

Multi-FPGA systems are widely used for rapid prototyping and logic verification of VLSIs. To
implement a huge logic circuit in a multi-FPGA system, the circuit needs to be partitioned into …

Dynamic reconfiguration is important for reconfigurable platforms. Parallel reconfigurable
computing (PRC) architecture consists of multiple dynamic reconfigurable computing (DRC) …

We formulate a solution for the temporal partitioning of dataflow graphs (DFGs) on a coarse-
grain reconfigurable array (CGRA) accelerator that is tightly coupled to system memory. The …

In this paper, we present a novel temporal partitioning algorithm that temporally partitions a
data flow graph on reconfigurable system. Our algorithm can be used to resolve the …

An important aspect of partial reconfiguration is reconfiguration overhead, which normally
includes the runtime reconfiguration time and the static reconfiguration data storage space …

This paper focuses on the design process for reconfigurable architecture. Our contribution
focuses on introducing a new temporal partitioning algorithm. Our algorithm is based on …

Simulation-based verification of electronic control units must face demands related to more
functionality and less time to verify it. To ensure a reliable system, one must determine how …