Review on recent advances of zinc substituted cobalt ferrite nanoparticles: Synthesis characterization and diverse applications

PA Vinosha, A Manikandan, ASJ Ceicilia, A Dinesh… - Ceramics …, 2021 - Elsevier
Researchers have taken a prodigious consideration in characterizing and synthesizing zinc
substituted cobalt ferrite nanoparticles because of their substantial applications across …

Low voltage analog circuit design techniques: A tutorial

S Yan, E Sanchez-Sinencio - IEICE Transactions on Fundamentals …, 2000 - search.ieice.org
Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In
particular,(i) technology considerations;(ii) transistor model capable to provide performance …

A 60-dB gain OTA operating at 0.25-V power supply in 130-nm digital CMOS process

LHC Ferreira, SR Sonkusale - IEEE Transactions on Circuits …, 2014 - ieeexplore.ieee.org
This paper presents a 60-dB gain bulk-driven Miller OTA operating at 0.25-V power supply
in the 130-nm digital CMOS process. The amplifier operates in the weak-inversion region …

A 2-nW 1.1-V self-biased current reference in CMOS technology

EM Camacho-Galeano… - … on Circuits and …, 2005 - ieeexplore.ieee.org
This work presents the design of an ultra-low-power self-biased 400-pA current source. We
propose the use of a very simple topology along with a design methodology based on the …

[图书][B] MOSFET modeling for circuit analysis and design

C Galup-Montoro - 2007 - books.google.com
This is the first book dedicated to the next generation of MOSFET models. Addressed to
circuit designers with an in-depth treatment that appeals to device specialists, the book …

CMOS low-power analog circuit design

CC Enz, EA Vittoz - Emerging Technologies: Designing Low …, 1996 - ieeexplore.ieee.org
This chapter covers device and circuit aspects of low-power analog CMOS circuit design.
The fundamental limits constraining the design of low-power circuits are first recalled with an …

Design of a low-noise low-voltage amplifier for improved neural signal recording

K Sharma, RK Tripathi, HS Jatana… - Review of Scientific …, 2022 - pubs.aip.org
Design of amplifier circuits with low-noise operable at low-power to be used, especially for
implantable neural interfaces, remains a huge challenge. This research paper presents the …

A 0.25-V rail-to-rail three-stage OTA with an enhanced DC gain

KC Woo, BD Yang - IEEE Transactions on Circuits and Systems …, 2019 - ieeexplore.ieee.org
This brief proposes a 0.25 V rail-to-rail three stage OTA. The proposed OTA improves a DC
gain by inserting an NMOS gate-driven amplifier into the conventional bulk-driven OTA. In …

A 0.6-V 13-bit 20-MS/s two-step TDC-assisted SAR ADC with PVT tracking and speed-enhanced techniques

M Zhang, CH Chan, Y Zhu… - IEEE Journal of Solid …, 2019 - ieeexplore.ieee.org
This article presents a low power-supplied 13-bit 20-MS/s time-to-digital converter (TDC)-
assisted successive approximation register (SAR) analog-to-digital converter (ADC). In this …

Ultra-low-voltage inverter-based operational transconductance amplifiers with voltage gain enhancement by improved composite transistors

LH Rodovalho, O Aiello, CR Rodrigues - Electronics, 2020 - mdpi.com
This paper proposes topological enhancements to increase voltage gain of ultra-low-voltage
(ULV) inverter-based OTAs. The two proposed improvements rely on adoption of composite …