Vertically-grown TFETs: an extensive analysis

AS Geege, TSA Samuel - Silicon, 2023 - Springer
TFET is an exciting device for ultra-low and low power implementations since it improves
electrical performance while also providing steeper switching ratio. This study encloses with …

Insights into the DC, RF/Analog and linearity performance of vertical tunneling based TFET for low-power applications

N Paras, SS Chauhan - Microelectronic Engineering, 2019 - Elsevier
The concept of dual metal and double gate in Vertical TFET is presented to show the
improvement of DC as well as analog/RF device performance standards due to enhanced …

A novel vertical tunneling based Ge-source TFET with enhanced DC and RF characteristics for prospect low power applications

N Paras, SS Chauhan - Microelectronic Engineering, 2019 - Elsevier
In this paper, we propose a novel germanium source based dual metal gate tunneling field
effect transistor (VGeDMG). Design of device effectively suppresses lateral tunneling current …

Temperature sensitivity analysis of vertical tunneling based dual metal Gate TFET on analog/RF FOMs

N Paras, SS Chauhan - Applied Physics A, 2019 - Springer
In this paper, we present a rigorous numerical simulation study on temperature sensitivity for
tunnel field effect transistor (TFET). The presented temperature sensitivity analysis is studied …

Investigation of RF and linearity performance of electrode work‐function engineered HDB vertical TFET

S Narwal, SS Chauhan - Micro & Nano Letters, 2019 - Wiley Online Library
This work realises a hetero‐dielectric buried oxide vertical tunnel field effect transistor (HDB
VTFET) and investigates its radio frequency (RF) and linearity characteristics. First time, the …

[HTML][HTML] Dual source negative capacitance GaSb/InGaAsSb/InAs heterostructure based vertical TFET with steep subthreshold swing and high on-off current ratio

MU Sohag, MS Islam, K Hosen, MAI Fahim… - Results in Physics, 2021 - Elsevier
Continuous downscaling of CMOS technology at the nanometer scale with conventional
MOSFETs leads to short channel effects (SCE), increased subthreshold slope (SS), and …

A new design approach to improve DC, analog/RF and linearity metrics of vertical TFET for RFIC design

SS Chauhan - Superlattices and Microstructures, 2018 - Elsevier
This paper presents a novel design of Vertical Tunnel Field Effect Transistor (VTFET) using
work-function engineering. In this work, we investigate the impact of work-function …

Design of double gate vertical tunnel field effect transistor using HDB and its performance estimation

SS Chauhan - Superlattices and Microstructures, 2018 - Elsevier
In this paper, we demonstrate the double gate vertical tunnel field-effect transistor using
homo/hetero dielectric buried oxide (HDB) to obtain the optimized device characteristics. In …

Investigation of hetero buried oxide and gate dielectric PNPN tunnel field effect transistors

K Ramkumar, VN Ramakrishnan - Silicon, 2021 - Springer
This paper investigates a novel hetero dielectric buried oxide and gate dielectric based
PNPN tunnel field effect transistor (HDB-HDG-PNPN-TFET) using 2-D simulation. The …

High performance drain engineered InGaN heterostructure tunnel field effect transistor

X Duan, J Zhang, J Chen, T Zhang, J Zhu, Z Lin, Y Hao - Micromachines, 2019 - mdpi.com
A drain engineered InGaN heterostructure tunnel field effect transistor (TFET) is proposed
and investigated by Silvaco Atlas simulation. This structure uses an additional metal on the …