RWCap: A floating random walk solver for 3-D capacitance extraction of very-large-scale integration interconnects
A floating random walk (FRW) solver, called RWCap, is presented for the capacitance
extraction of very-large-scale integration (VLSI) interconnects. An approach, including the …
extraction of very-large-scale integration (VLSI) interconnects. An approach, including the …
[图书][B] Advanced field-solver techniques for RC extraction of integrated circuits
W Yu, X Wang - 2014 - Springer
The main goal of writing this book was to present a methodological and algorithmic
perspective on the field-solver-based parasitic extraction of integrated circuits (ICs) …
perspective on the field-solver-based parasitic extraction of integrated circuits (ICs) …
[图书][B] Machine Learning Applications in Electronic Design Automation
H Ren, J Hu - 2022 - Springer
Electronic design automation (EDA) is a software technology that attempts to let computers
undertake chip design tasks so that we can handle complexities beyond manual design …
undertake chip design tasks so that we can handle complexities beyond manual design …
Efficient space management techniques for large-scale interconnect capacitance extraction with floating random walks
C Zhang, W Yu - … Transactions on Computer-Aided Design of …, 2013 - ieeexplore.ieee.org
In the capacitance extraction with the floating random walk (FRW) algorithm, the space
management approach is required to facilitate finding the nearest conductor. The Octree and …
management approach is required to facilitate finding the nearest conductor. The Octree and …
Variation-aware stochastic extraction with large parameter dimensionality: Review and comparison of state of the art intrusive and non-intrusive techniques
T El-Moselhy, L Daniel - 2011 12th International Symposium on …, 2011 - ieeexplore.ieee.org
In this paper we review some of the state of the art techniques for parasitic interconnect
extraction in the presence of random geometrical variations due to uncertainties in the …
extraction in the presence of random geometrical variations due to uncertainties in the …
GPU-friendly floating random walk algorithm for capacitance extraction of VLSI interconnects
The floating random walk (FRW) algorithm is an important field-solver algorithm for
capacitance extraction, which has several merits compared with other boundary element …
capacitance extraction, which has several merits compared with other boundary element …
A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction
TA El-Moselhy, IM Elfadel, L Daniel - Proceedings of the 2009 …, 2009 - dl.acm.org
With the adoption of ultra regular fabric paradigms for controlling design printability at the
22nm node and beyond, there is an emerging need for a layout-driven, pattern-based …
22nm node and beyond, there is an emerging need for a layout-driven, pattern-based …
Efficient statistical capacitance extraction of nanometer interconnects considering the on-chip line edge roughness
In this paper, efficient techniques are presented to extract the statistical interconnect
capacitance due to random geometric variations, especially the line-edge roughness (LER) …
capacitance due to random geometric variations, especially the line-edge roughness (LER) …
Fast floating random walk algorithm formulti-dielectric capacitance extraction with numerical characterization of Green's functions
The floating random walk (FRW) algorithm has several advantages for extracting 3D
interconnect capacitance. However, for multi-layer dielectrics in VLSI technology, the …
interconnect capacitance. However, for multi-layer dielectrics in VLSI technology, the …
On process-aware 1-D standard cell design
When VLSI technology scales down to sub-40nm process node, systematic variation
introduced by the lithography is a persistent challenge to the manufacturability. The …
introduced by the lithography is a persistent challenge to the manufacturability. The …