A review on performance comparison of advanced MOSFET structures below 45 nm technology node

N Mendiratta, SL Tripathi - Journal of Semiconductors, 2020 - iopscience.iop.org
CMOS technology is one of the most frequently used technologies in the semiconductor
industry as it can be successfully integrated with ICs. Every two years the number of MOS …

Physics based numerical model of a nanoscale dielectric modulated step graded germanium source biotube FET sensor: modelling and simulation

A Das, S Rewari, BK Kanaujia, SS Deswal… - Physica …, 2023 - iopscience.iop.org
This paper proposes a novel dielectric modulated step-graded germanium source biotube
FET for label-free biosensing applications. Its integrated structure and unique design …

18nm n-channel and p-channel Dopingless asymmetrical Junctionless DG-MOSFET: low power CMOS based digital and memory applications

N Mendiratta, SL Tripathi - Silicon, 2022 - Springer
In this paper, an 18nm dopingless asymmetrical junctionless (AJ) double gate (DG)
MOSFET has been designed for suppressed short channel effects (SCEs) for low power …

Dielectrically-modulated GANFET biosensor for label-free detection of DNA and avian influenza virus: proposal and modeling

S Yadav, A Das, S Rewari - ECS Journal of Solid State Science …, 2024 - iopscience.iop.org
This paper introduces a novel device called the Gate All Around Engineered Gallium Nitride
Field Effect Transistor (GAAE-GANFET), designed specifically for label-free biosensing …

Temperature analysis of DMGC CGAA FET for future deep space and military applications: an insight into Analog/RF/Self-Heating/Linearity

PK Mudidhe, BR Nistala - ECS Journal of Solid State Science and …, 2023 - iopscience.iop.org
This manuscript introduces a pioneering investigation on the temperature effects of Dual
Material Graded Channel (DMGC) Cylindrical Gate All Around (CGAA) FET by outlining its …

Design and performance analysis of advanced MOSFET structures

M Aditya, KS Rao - Transactions on Electrical and Electronic Materials, 2022 - Springer
With respect to semiconductor industry, Complementary metal oxide semiconductor is
considered to be successful because of integration in Integrated Circuits (ICs). As transistor …

A nanoscale junctionless FET to amend the electric field distribution using a β-Ga2O3 packet

M Heidari, AA Orouji, SA Bozorgi - Journal of Materials Science: Materials …, 2023 - Springer
This paper describes a junctionless double-gate FET at nanoscale dimensions that utilizes a
ß-Ga2O3 packet to improve and amend the electric field at the device's beginning and in the …

Analytical model of dopingless asymmetrical junctionless double gate MOSFET

N Mendiratta, SL Tripathi, S Chander - Silicon, 2022 - Springer
In this paper surface potential for proposed asymmetrical junctionless double-gate (AJDG)
MOSFET having a channel length of 18 nm and gate, length is 11 nm is derived based on …

2-D analytical modeling of drain and gate-leakage currents of cylindrical gate asymmetric halo doped dual material-junctionless accumulation mode MOSFET

K Baral, PK Singh, S Kumar, A Singh, M Tripathy… - … -International Journal of …, 2020 - Elsevier
This paper reports a physics-based analytical model for the cylindrical-gate (CG) asymmetric
halo doped graded-channel (GC) dual-material (DM) junctionless-accumulation-mode …

[PDF][PDF] Effect of channel length variation on analog and RF performance of junctionless double gate vertical MOSFET

KE Kaharudin, F Salehuddin, ASM Zain… - J. Eng. Sci …, 2019 - researchgate.net
This paper investigates the effect of channel length (Lch) variation upon analogue and radio
frequency (RF) performance of Junctionless Double Gate Vertical MOSFET (JLDGVM). The …