A contact resistance () becomes a major parasitic resistance in highly scaled modern
semiconductor devices. A wrap-around contact (WAC) has been suggested as a promising …

In this article, a reliable drain-extended (De) fin-shaped field-effect transistor (DeFinFET)
with improved thermal performance and electrical performance is proposed for high-voltage …

This research intends to develop an analytical model for a heterojunction graphene
nanoribbon double-gate tunnel field-effect transistor with a stacked SiO 2/HfO 2 layer …

This paper introduces a dual gate Graphene Nano-Ribbon Tunnel Field Effect Transistor
(DG GNR TFET) structure and its performance characteristics are analysed. Technology …

This paper comprises of design and analysis of novel gate all around (GAA) cylindrical
tunnel field effect transistor (TFET) using technology computer aided designing (TCAD) tool …

abstract Low power and high speed devices are the future transistor technology. The low
power and higher the wield of Strained Channels with functionality booster becomes more …

The influence of trap carriers at the Si-SiO 2 interface near the source channel junction is
analysed in this paper. The drain current is computed using the analytical model and it is …

In this paper, a new SiGe/Si heterojunction double-gate heterogate dielectric tunneling field-
effect transistor with an auxiliary tunneling barrier layer (HJ-HD-P-DGTFET) is proposed and …

This paper presents a novel 2D analytical model for investigating the influence of the
ferroelectric dielectric on the performance of pocket doped double gate tunnel FET. It takes …

This paper analyzed the Carbon Nano Tube (CNT) field-effect carrier mobility at the low field
in the back-gated CNT-FET devices. This model is based on calculating the mean free paths …