Design of a high-efficient MSD adder
J Peng, R Shen, X Ping - The Journal of Supercomputing, 2016 - Springer
Carry propagation delay is a big obstacle to improve the addition efficiency in computer
system. And the more data bits the operands have, the delay is more serious. As data bits of …
system. And the more data bits the operands have, the delay is more serious. As data bits of …
An improved maximally redundant signed digit adder
G Jaberipur, S Gorgin - Computers & Electrical Engineering, 2010 - Elsevier
Signed digit (SD) number systems support digit-parallel carry-free addition, where the sum
digits absorb the possible signed carries in {− 1, 0, 1}. Radix-2h maximally redundant SD …
digits absorb the possible signed carries in {− 1, 0, 1}. Radix-2h maximally redundant SD …
Design of fault injection technique for VLSI digital circuits
BJ Lavanyashree, S Jamuna - 2017 2nd IEEE International …, 2017 - ieeexplore.ieee.org
Development of VLSI technology has increased the design complexity on the IC chip. With
this, the possibility of fault occurrence also has increased. In many of the mission critical …
this, the possibility of fault occurrence also has increased. In many of the mission critical …
Nonspeculative decimal signed digit adder
Decimal floating point (DFP) arithmetic has been paid more attention in recent years, since it
is superior to the binary counterpart in the financial and commercial computing including …
is superior to the binary counterpart in the financial and commercial computing including …
Redundant-digit floating-point addition scheme based on a stored rounding value
Due to the widespread use and inherent complexity of floating-point addition, much effort
has been devoted to its speedup via algorithmic and circuit techniques. We propose a new …
has been devoted to its speedup via algorithmic and circuit techniques. We propose a new …
Area and power efficient decimal carry‐free adder
As decimal floating‐point (DFP) is better than binary floating‐point in commercial and
financial computing including billing systems, currency conversion, tax calculation and …
financial computing including billing systems, currency conversion, tax calculation and …
A novel 14-transistors low-power high-speed PPM adder
R Tripathi, S Mishra, SG Prakash - … International Symposium on …, 2011 - ieeexplore.ieee.org
In this paper we mainly deal with design and simulation of different redundant-binary full
adder (Plus-Plus-Minus Adder) topologies using minimum number of transistors. These PPM …
adder (Plus-Plus-Minus Adder) topologies using minimum number of transistors. These PPM …
[PDF][PDF] Non-contact measurement of soil moisture content using thermal infrared sensor and weather variables
T Alshikaili - 2007 - harvest.usask.ca
The use of remote sensing technology has made it possible for the non-contact
measurement of soil moisture content (SMC). Many remote sensing techniques can be used …
measurement of soil moisture content (SMC). Many remote sensing techniques can be used …
[PDF][PDF] Design and Synthesis of High Speed Low Power Signed Digit Adders
G JABERIPUR, S Gorgin - 2011 - sid.ir
Signed digit (SD) number systems provide the possibility of constant-time addition, where
inter-digit carry propagation is eliminated. Such carry-free addition is primarily a three-step …
inter-digit carry propagation is eliminated. Such carry-free addition is primarily a three-step …
[PDF][PDF] A high speed low power signed digit adder
G Jaberipur, S Gorgin - The 16th Iranian conference on …, 2008 - facultymembers.sbu.ac.ir
Signed digit (SD) number systems provide the possibility of constant-time addition, where
interdigit carry propagation is eliminated. Such carry-free addition is primarily a three-step …
interdigit carry propagation is eliminated. Such carry-free addition is primarily a three-step …