An overview of low-power techniques for field-programmable gate arrays
J Lamoureux, W Luk - 2008 NASA/ESA Conference on …, 2008 - ieeexplore.ieee.org
This paper provides an overview of low-power techniques for field-programmable gate
arrays (FPGAs). It covers system-level design techniques and device-level design …
arrays (FPGAs). It covers system-level design techniques and device-level design …
[PDF][PDF] Reduction of power consumption in FPGAs-an overview
Field Programmable Gate Arrays FPGAs are highly desirable for implementation of digital
systems due to their flexibility, programmability and low end product life cycle. In more than …
systems due to their flexibility, programmability and low end product life cycle. In more than …
Radical-based neighboring segment matching method for on-line Chinese character recognition
KS Chou, KC Fan, TI Fan - Proceedings of 13th International …, 1996 - ieeexplore.ieee.org
A new approach to stroke-order and stroke-number free on-line handwritten Chinese
character recognition is presented in this paper. In this new scheme, the decision rule of the …
character recognition is presented in this paper. In this new scheme, the decision rule of the …
Impact of III–V and Ge Devices on Circuit Performance
J Park, S Oh, SY Kim, HSP Wong… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
III-V and germanium (Ge) field-effect transistors (FETs) have been studied as candidates for
post Si CMOS. In this paper, the performance of various digital blocks and static random …
post Si CMOS. In this paper, the performance of various digital blocks and static random …
[HTML][HTML] A new FPGA architecture suitable for DSP applications
W Liyun, L Jinmei, T Jiarong, T Pushan, C Xing… - Journal of …, 2011 - jos.ac.cn
A new FPGA architecture suitable for digital signal processing applications is presented.
DSP modules can be inserted into FPGA conveniently with the proposed architecture, which …
DSP modules can be inserted into FPGA conveniently with the proposed architecture, which …
Design and optimization of DSP architectures for multi-context FPGA with dynamic reconfiguration
RV Warrier - 2016 - dr.ntu.edu.sg
Field Programmable Gate Arrays (FPGAs) are now widely adopted as hardware
accelerators due to their inherent parallel processing capability. However, the sub-optimal …
accelerators due to their inherent parallel processing capability. However, the sub-optimal …
[PDF][PDF] International Journal of Information Engineering and Electronic Business (IJIEEB)
In financial enterprise, electronic banking is an entirely financial enterprise integrated IT
which is used for financial data transaction, human resources, and other important financial …
which is used for financial data transaction, human resources, and other important financial …
A new FPGA architecture suitable for DSP applications
L Wang, J Lai, J Tong, P Tang, X Chen… - Journal of …, 2011 - iopscience.iop.org
A new FPGA architecture suitable for digital signal processing applications is presented.
DSP modules can be inserted into FPGA conveniently with the proposed architecture, which …
DSP modules can be inserted into FPGA conveniently with the proposed architecture, which …
System-level methods for power and energy efficiency of FPGA-based embedded systems
PŁP Czapski - 2010 - dr.ntu.edu.sg
Field programmable gate array (FPGA) processing units present considerably higher
programming flexibility than other fixed architectures (eg microcontrollers (MCU's), digital …
programming flexibility than other fixed architectures (eg microcontrollers (MCU's), digital …