Augmenting Amdahl's law with a corollary for multicore hardware makes it relevant to future
generations of chips with multiple processor cores. Obtaining optimal multicore performance …

Transactional memory (TM) simplifies parallel programming by guaranteeing that
transactions appear to execute atomically and in isolation. Implementing these properties …

The instruction-level parallelism found in a conventional instruction stream is limited. Studies
have shown the limits of processor utilization even for today's superscalar microprocessors …

Specialized on-chip accelerators are widely used to improve the energy efficiency of
computing systems. Recent advances in memory technology have enabled near-data …

Trends in VLSI technology scaling demand that future computing devices be narrowly
focused to achieve high performance and high efficiency, yet also target the high volumes …

The microprocessor industry is currently struggling with higher development costs and
longer design times that arise from exceedingly complex processors that are pushing the …

While architects understand how to build cost-effective parallel machines across a wide
spectrum of machine sizes (ranging from within a single chip to large-scale servers), the real …

Current shared memory multicore and multiprocessor systems are nondeterministic. Each
time these systems execute a multithreaded application, even if supplied with the same …

We propose ACE (Acquisitional Context Engine), a middleware that supports continuous
context-aware applications while mitigating sensing costs for inferring contexts. ACE …

The advent of multicore processors has renewed interest in the idea of incorporating
transactions into the programming model used to write parallel programs. This approach …