Efficient 3-parallel polyphase odd length FIR filter using Brent Kung adder and Booth multiplier for VLSI applications
In design and implementation of DSP processors reduction in power consumption and area
optimization constitutes the primary criteria. Parallel Finite Impulse Response (FIR) filter is at …
optimization constitutes the primary criteria. Parallel Finite Impulse Response (FIR) filter is at …
Enhancing VLSI Performance: An Innovative Approach to 3-Parallel Polyphase Odd-Length FIR Filtering with Kogge-Stone Adder and Booth Multiplier
SVS Prasad, NSS Sagar, MVN Pushkala… - 2024 International …, 2024 - ieeexplore.ieee.org
This paper proposes a novel technique towards enhancing VLSI performance as 3-Parallel
Polyphase Odd-Length FIR Filtering. Here, the design primarily consists of Kogge-Stone …
Polyphase Odd-Length FIR Filtering. Here, the design primarily consists of Kogge-Stone …
[引用][C] Efficient low power multiplier architecture for digital fir filters
J Selvakumar - 2013 - shodhganga.inflibnet.ac.in
Shodhganga@INFLIBNET: Efficient low power multiplier architecture for digital fir filters Skip
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