Exploring the performance benefit of hybrid memory system on HPC environments

IB Peng, R Gioiosa, G Kestor, P Cicotti… - 2017 IEEE …, 2017 - ieeexplore.ieee.org
Hardware accelerators have become a de-facto standard to achieve high performance on
current supercomputers and there are indications that this trend will increase in the future …

Characterizing the performance benefit of hybrid memory system for HPC applications

IB Peng, R Gioiosa, G Kestor, JS Vetter, P Cicotti… - Parallel Computing, 2018 - Elsevier
Heterogenous memory systems that consist of multiple memory technologies are becoming
common in high-performance computing environments. Modern processors and …

Vectorization of high-performance scientific calculations using AVX-512 intruction set

BM Shabanov, AA Rybakov, SS Shumilin - Lobachevskii Journal of …, 2019 - Springer
Modern calculation codes used in supercomputing are very demanding of computing
resources. For their effective appliance requires the use of parallelization at all levels …

Improving Uintah's scalability through the use of portable Kokkos-based data parallel tasks

JK Holmen, A Humphrey, D Sunderland… - Proceedings of the …, 2017 - dl.acm.org
The University of Utah's Carbon Capture Multidisciplinary Simulation Center (CCMSC) is
using the Uintah Computational Framework to predict performance of a 1000 MWe ultra …

Exploring HPC and big data convergence: A graph processing study on Intel Knights Landing

A Uta, AL Varbanescu, A Musaafir… - 2018 IEEE …, 2018 - ieeexplore.ieee.org
The question" Can big data and HPC infrastructure converge?" has important implications
for many operators and clients of modern computing. However, answering it is challenging …

Early experience on using Knights Landing processors for Lattice Boltzmann applications

E Calore, A Gabbana, SF Schifano… - … Conference on Parallel …, 2017 - Springer
Abstract The Knights Landing (KNL) is the codename for the latest generation of Intel
processors based on Intel Many Integrated Core (MIC) architecture. It relies on massive …

Beyond 16GB: out-of-core stencil computations

IZ Reguly, GR Mudalige, MB Giles - … of the Workshop on Memory Centric …, 2017 - dl.acm.org
Stencil computations are a key class of applications, widely used in the scientific computing
community, and a class that has particularly benefited from performance improvements on …

[PDF][PDF] Performance comparison of intel xeon phi knights landing

IA Jabbie, G Owen, B Whiteley - SIAM Undergraduate Research Online …, 2017 - siam.org
Abstract The Intel Xeon Phi is a many-core processor with a theoretical peak performance of
over 3 TFLOP/s of double precision. We contrast the performance of the second-generation …

Blocked all-pairs shortest paths algorithm on Intel Xeon Phi KNL processor: a case study

E Rucci, A De Giusti, M Naiouf - … 2017: 23rd Argentine Congress, La Plata …, 2018 - Springer
Manycores are consolidating in HPC community as a way of improving performance while
keeping power efficiency. Knights Landing is the recently released second generation of …

Explicit data layout management for autotuning exploration on complex memory topologies

S Perarnau, B Videau, N Denoyelle… - 2019 IEEE/ACM …, 2019 - ieeexplore.ieee.org
The memory topology of high-performance computing platforms is becoming more complex.
Future exascale platforms in particular are expected to feature multiple types of memory …