Proposal and Analysis of a High Read and Write Noise Margin 6T-SRAM Cell Using Novel Core Insulator Double-Gate (CIDG) MOSFETs

S Jaiswal, SK Gupta - Journal of Electronic Materials, 2024 - Springer
Static random-access memory (SRAM) is in great demand due to the development of
portable electronics and its growing popularity in system-on-chip and advanced very-large …

High-Performance and Low-Power Decoder Circuits for SRAMs Using Mixed-Logic Scheme

D Xia, Y Zhang, Y Tian, M Xu, L Wen - Integration, 2024 - Elsevier
A mixed-logic design scheme utilizing pass-transistor logic (PTL) and dual-value logic (DVL)
in combination with static CMOS logic for decoders in SRAMs is proposed. By using of the …

The Future of the Non-memory Semiconductor Industry

LR Thoutam, YS Song - … of Emerging Materials for Semiconductor Industry, 2024 - Springer
The non-memory semiconductor industry plays a critical role in powering various electronic
devices and technologies. This industry encompasses a wide range of semiconductor …

A novel driver less SRAM with indirect read for low energy consumption and read noise elimination

D Nayak, U Nanda, PK Rout, SM Biswal… - 2019 Devices for …, 2019 - ieeexplore.ieee.org
The modern electronics gadget has influenced tremendously every aspects of life. The
demand to add more and more functionality has forced to increase the performance of the …

ECG Heartbeat Signal Classification and Detection of Cardiac Abnormalities using Deep Learning

AK Tiwary, PK Rout, D Tripathy… - 2023 1st International …, 2023 - ieeexplore.ieee.org
cardiovascular diseases (CVDs) are evolved as the general chronic diseases that create
major threats to the health of human beings. The ECG machine can be used to track the …

Analysis of static noise margin of 10T SRAM using sleepy stack transistor approach

U Nanda, D Nayak, SK Saw, AM KK… - 2021 Devices for …, 2021 - ieeexplore.ieee.org
The latest electronic gadgets demand many functionalities which requires enhanced
performance of the processor. To ensure this, cache based on Static Random Access …

Design and Implementation of Low Power High Speed Robust 10T SRAM

K Radhika, YMM Babu, S Mishra - … International Conference on …, 2021 - ieeexplore.ieee.org
The traditional SRAM cell enables high density and fast differential sensing but is subjected
to semi-selective and read-risk problems. While a traditional eight-transistor SRAM cell …

Memory Compiler for RRAM In-Memory Computation

Z Lin, J Zhang, X Wu, C Peng - 2022 7th International …, 2022 - ieeexplore.ieee.org
The” storage wall” and” power consumption wall” brought by von Neumann architecture
begin to restrict the development of SOC. In order to solve the problem caused by the …

Cache memory architecture for the convergence of machine learning, Internet of Things (IoT), and blockchain technologies

R Agrawal, S Singh, K Sharma - 2022 - IET
This chapter describes the need for cache memory architecture for the convergence of
machine learning (ML), the Internet of Things (IoTs), and blockchain technologies with a …

Design and Analysis of Low Power CMOS SRAM Cells 7T and 9T

V Choudhary, DS Yadav - 2022 10th International Conference …, 2022 - ieeexplore.ieee.org
7T and 9T SRAM cells are compared by the software Cadence Virtuoso tool using 180nm
technology. Designing a memory of low power consumption is a challenging concept in the …