A survey of fpga logic cell designs in the light of emerging technologies

S Rai, P Nath, A Rupani, SK Vishvakarma… - IEEE Access, 2021 - ieeexplore.ieee.org
The functional component for an FPGA is the logic element which enables it to adapt to
various hardware descriptions. This behavior is mostly due to the MUX-like functional …

Pushing the communication barrier in secure computation using lookup tables

G Dessouky, F Koushanfar, AR Sadeghi… - Cryptology ePrint …, 2018 - eprint.iacr.org
Secure two-party computation has witnessed significant efficiency improvements in the
recent years. Current implementations of protocols with security against passive adversaries …

Quantum circuits for floating-point arithmetic

T Haener, M Soeken, M Roetteler, KM Svore - International conference on …, 2018 - Springer
Quantum algorithms to solve practical problems in quantum chemistry, materials science,
and matrix inversion often involve a significant amount of arithmetic operations which act on …

Fast Boolean matching based on NPN classification

Z Huang, L Wang, Y Nasikovskiy… - … Conference on Field …, 2013 - ieeexplore.ieee.org
This paper proposes a fast algorithm for Boolean matching of completely specified Boolean
functions. The algorithm is based on the NPN classification and can be applied on-the-fly to …

Area–oriented technology mapping for LUT–based logic blocks

M Kubica, D Kania - International Journal of Applied Mathematics and …, 2017 - sciendo.com
One of the main aspects of logic synthesis dedicated to FPGA is the problem of technology
mapping, which is directly associated with the logic decomposition technique. This paper …

Technology mapping oriented to adaptive logic modules

M Kubica, D Kania - Bulletin of the Polish Academy of Sciences …, 2019 - yadda.icm.edu.pl
This paper presents an innovative method of technology mapping of the circuits in ALM
appearing in FPGA devices by Intel. The essence of the idea is based on using triangle …

Logic synthesis for established and emerging computing

E Testa, M Soeken, LG Amar… - Proceedings of the …, 2018 - ieeexplore.ieee.org
Logic synthesis is an enabling technology to realize integrated computing systems, and it
entails solving computationally intractable problems through a plurality of heuristic …

Improving FPGA performance with a S44 LUT structure

W Feng, J Greene, A Mishchenko - Proceedings of the 2018 ACM/SIGDA …, 2018 - dl.acm.org
FPGA performance depends in part on the choice of basic logic cell. Previous work dating
back to 1999-2005 found that the best look-up table (LUT) sizes for area-delay product are 4 …

Lazy man's logic synthesis

W Yang, L Wang, A Mishchenko - Proceedings of the International …, 2012 - dl.acm.org
Deriving a circuit for a Boolean function or improving an available circuit are typical tasks
solved by logic synthesis. Numerous algorithms in this area have been proposed and …

LUT-based hierarchical reversible logic synthesis

M Soeken, M Roetteler, N Wiebe… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
We present a synthesis framework to map logic networks into quantum circuits for quantum
computing. The synthesis framework is based on lookup-table (LUT) networks, which play a …