Hardware/software codesign: The past, the present, and predicting the future
J Teich - Proceedings of the IEEE, 2012 - ieeexplore.ieee.org
Hardware/software codesign investigates the concurrent design of hardware and software
components of complex electronic systems. It tries to exploit the synergy of hardware and …
components of complex electronic systems. It tries to exploit the synergy of hardware and …
Electronic system-level synthesis methodologies
With ever-increasing system complexities, all major semiconductor roadmaps have
identified the need for moving to higher levels of abstraction in order to increase productivity …
identified the need for moving to higher levels of abstraction in order to increase productivity …
Organizing the last line of defense before hitting the memory wall for CMPs
C Liu, A Sivasubramaniam… - … Symposium on High …, 2004 - ieeexplore.ieee.org
The last line of defense in the cache hierarchy before going to off-chip memory is very critical
in chip multiprocessors (CMPs) from both the performance and power perspectives. We …
in chip multiprocessors (CMPs) from both the performance and power perspectives. We …
Daedalus: toward composable multimedia MP-SoC design
H Nikolov, M Thompson, T Stefanov… - Proceedings of the 45th …, 2008 - dl.acm.org
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-
SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which …
SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which …
FARSI: An early-stage design space exploration framework to tame the domain-specific system-on-chip complexity
Domain-specific SoCs (DSSoCs) are an attractive solution for domains with extremely
stringent power, performance, and area constraints. However, DSSoCs suffer from two …
stringent power, performance, and area constraints. However, DSSoCs suffer from two …
Combined system synthesis and communication architecture exploration for MPSoCs
M Lukasiewycz, M Streubuhr, M Glaß… - … , Automation & Test …, 2009 - ieeexplore.ieee.org
A novel design space exploration approach is proposed that enables a concurrent
optimization of the topology, the process binding, and the communication routing of a …
optimization of the topology, the process binding, and the communication routing of a …
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models
SystemCoDesigner is an ESL tool developed at the University of Erlangen-Nuremberg,
Germany. SystemCoDesigner offers a fast design space exploration and rapid prototyping of …
Germany. SystemCoDesigner offers a fast design space exploration and rapid prototyping of …
A generalized static data flow clustering algorithm for MPSoC scheduling of multimedia applications
In this paper, we propose a generalized clustering approach for static data flow subgraphs
mapped onto individual processors in Multi-Processor System on Chips (MPSoCs). The goal …
mapped onto individual processors in Multi-Processor System on Chips (MPSoCs). The goal …
LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory
Phase change memory (PCM) has emerged as a promising technology for main memory
due to many advantages, such as better scalability, non-volatility and fast read access …
due to many advantages, such as better scalability, non-volatility and fast read access …
A high-level virtual platform for early MPSoC software development
J Ceng, W Sheng, J Castrillon, A Stulova… - Proceedings of the 7th …, 2009 - dl.acm.org
Multiprocessor System-on-Chips (MPSoCs) are nowadays widely used, but the problem of
their software development persists to be one of the biggest challenges for developers …
their software development persists to be one of the biggest challenges for developers …