Függer et al.(2016) proved that no existing digital circuit model, including those based on
pure and inertial delay channels, faithfully captures glitch propagation: for the short-pulse …

This book provides the reader with an extensive background in the field of logic-timing
simulation and delay modeling. It includes detailed information on the challenges of logic …

In contrast to analog models, binary circuit models are high-level abstractions that play an
important role in assessing the correctness and performance characteristics of digital circuit …

Fast digital timing simulations based on continuous-time, digital-value circuit models are an
attractive and heavily used alternative to analog simulations. Models based on analytic …

In previous papers we have presented a very accurate model that handles the generation
and propagation of glitches, which makes an important headway in logic timing simulation …

This paper presents HALOTIS, a novel high accuracy logic timing simulation tool, that
incorporates a new simulation algorithm based on different concepts for transitions and …

Delay estimation is a crucial task in digital circuit design as it provides the possibility to
assure the desired functionality, but also prevents undesired behavior very early. For this …

The art of ERP implementation stands in matching ERP features with the requirements of an
organisation so as to define how to adapt the system and/or the organisation to reach a …

In this work, we present a computational behavioral model for logic gates called Internode
(Internal Node Logic Computational Model) that considers the functionality of the gate as …

As delay models used in logic timing simulation become more and more complex, the
problem of model parameter values extraction arise as an important issue, which it is …