Power reduction techniques for microprocessor systems

V Venkatachalam, M Franz - ACM Computing Surveys (CSUR), 2005 - dl.acm.org
Power consumption is a major factor that limits the performance of computers. We survey the
“state of the art” in techniques that reduce the total power consumed by a microprocessor …

Orion: A power-performance simulator for interconnection networks

HS Wang, X Zhu, LS Peh, S Malik - 35th Annual IEEE/ACM …, 2002 - ieeexplore.ieee.org
We present Orion, a power-performance interconnection network simulator that is capable of
providing detailed power characteristics, in addition to performance characteristics, to …

Energy-conscious compilation based on voltage scaling

H Saputra, M Kandemir, N Vijaykrishnan… - Proceedings of the joint …, 2002 - dl.acm.org
As energy consumption has become a majorconstraint in current system design, it is
essential to look beyond the traditional low-power circuit and architectural optimizations …

Scheduling for heterogeneous processors in server systems

S Ghiasi, T Keller, F Rawson - Proceedings of the 2nd Conference on …, 2005 - dl.acm.org
Applications on today's high-end systems typically make varying load demands over time. A
single application may have many different phases during its lifetime, and workload mixes …

Effective dynamic voltage scaling through CPU-boundedness detection

CH Hsu, W Feng - International Workshop on Power-Aware Computer …, 2004 - Springer
Dynamic voltage scaling (DVS) allows a program to execute at a non-peak CPU frequency
in order to reduce CPU power, and hence, energy consumption; however, it is oftentimes …

Scheduling processor voltage and frequency in server and cluster systems

R Kotla, S Ghiasi, T Keller… - 19th IEEE International …, 2005 - ieeexplore.ieee.org
Modern server farm and cluster sites consume large quantities of energy both to power and
cool the machines in the site. At the same time, less power supply redundancy is offered and …

[图书][B] Compiler-directed dynamic voltage and frequency scaling for CPU power and energy reduction

CH Hsu - 2003 - search.proquest.com
The high power consumption of a processor is becoming a critical problem for both battery-
powered devices and high-performance computers. It reduces circuit reliability, complicates …

[PDF][PDF] Compiler-directed dynamic voltage scaling for memory-bound applications

CH Hsu, U Kremer - Department of Computer Science Rutgers University …, 2002 - Citeseer
This paper presents the design and implementation of a compiler algorithm that effectively
reduces the energy usage of memory-bound applications via dynamic voltage scaling …

Combined circuit and architectural level variable supply-voltage scaling for low power

H Li, CY Cher, K Roy… - IEEE transactions on very …, 2005 - ieeexplore.ieee.org
Energy-efficient processor design is becoming more and more important with technology
scaling and with high performance requirements. Supply-voltage scaling is an efficient way …

Dynamic MIPS rate stabilization for complex processors

J Suh, CT Huang, M Dubois - ACM Transactions on Architecture and …, 2015 - dl.acm.org
Modern microprocessor cores reach their high performance levels with the help of high clock
rates, parallel and speculative execution of a large number of instructions, and vast cache …