Recent years have seen a dramatic increase in the microarchitectural complexity of
processors. This increase in complexity presents a twofold challenge for the field of …

Online Reinforcement Learning (RL) has been adopted as an effective mechanism in
various decision-making problems in microarchitecture. Its high adaptability and the ability to …

Modern processors employ a decoupled frontend with Fetch Directed Instruction Prefetching
(FDIP) to avoid frontend stalls in data center applications. However, the large branch …

Modern data center applications experience frequent branch mispredictions–degrading
performance, increasing cost, and reducing energy efficiency in data centers. Even the state …

Address translation is a performance bottleneck in data-intensive workloads due to large
datasets and irregular access patterns that lead to frequent high-latency page table walks …

The increase in working set sizes of contemporary applications outpaces the growth in
cache sizes, resulting in frequent main memory accesses that deteriorate system …

Conventional virtual memory (VM) frameworks enable a virtual address to flexibly map to
any physical address. This flexibility necessitates large data structures to store virtual-to …

Microarchitecture research relies on performance models with various degrees of accuracy
and speed. In the past few years, one such model, ChampSim, has started to gain significant …

As the volume of data processed by applications has increased, considerable attention has
been paid to data address translation overheads, leading to the widespread use of larger …

Large pages are widely supported in modern hardware and OSes to reduce the overhead of
TLB misses. However, memory deduplication can be inefficient with large pages, leading to …