ecoHMEM: Improving object placement methodology for hybrid memory systems in HPC
Recent byte-addressable persistent memory (PMEM) technology offers capacities
comparable to storage devices and access times much closer to DRAMs than other non …
comparable to storage devices and access times much closer to DRAMs than other non …
Td-nuca: runtime driven management of nuca caches in task dataflow programming models
In high performance processors, the design of on-chip memory hierarchies is crucial for
performance and energy efficiency. Current processors rely on large shared Non-Uniform …
performance and energy efficiency. Current processors rely on large shared Non-Uniform …
Single-node partitioned-memory for huge graph analytics: cost and performance trade-offs
Because of cost, non-volatile memory NVDIMMs such as Intel Optane are attractive in single-
node big-memory systems. We evaluate performance and cost trade-offs when using …
node big-memory systems. We evaluate performance and cost trade-offs when using …
Design and implementation of a criticality-and heterogeneity-aware runtime system for task-parallel applications
Heterogeneous multiprocessing (HMP) is an emerging technology for high-performance and
energy-efficient computing. While task parallelism is widely used in various computing …
energy-efficient computing. While task parallelism is widely used in various computing …
Runtime-assisted cache coherence deactivation in task parallel programs
With increasing core counts, the scalability of directory-based cache coherence has become
a challenging problem. To reduce the area and power needs of the directory, recent …
a challenging problem. To reduce the area and power needs of the directory, recent …
Explicit data layout management for autotuning exploration on complex memory topologies
The memory topology of high-performance computing platforms is becoming more complex.
Future exascale platforms in particular are expected to feature multiple types of memory …
Future exascale platforms in particular are expected to feature multiple types of memory …
Using performance attributes for managing heterogeneous memory in hpc applications
The complexity of memory systems has increased considerably over the past decade.
Supercomputers may now include several levels of heterogeneous and non-uniform …
Supercomputers may now include several levels of heterogeneous and non-uniform …
Pattern-aware staging for hybrid memory systems
E Arima, M Schulz - International Conference on High Performance …, 2020 - Springer
The ever increasing demand for higher memory performance and—at the same time—larger
memory capacity is leading the industry towards hybrid main memory designs, ie, memory …
memory capacity is leading the industry towards hybrid main memory designs, ie, memory …
Memory bandwidth and latency in HPC: system requirements and performance impact
M Radulović - 2019 - upcommons.upc.edu
A major contributor to the deployment and operational costs of a large-scale high-
performance computing (HPC) clusters is the memory system. In terms of system …
performance computing (HPC) clusters is the memory system. In terms of system …
Online Management of Hybrid DRAM-NVMM Memory for HPC
R Salkhordeh, A Brinkmann - 2019 IEEE 26th International …, 2019 - ieeexplore.ieee.org
Non-volatile main memories (NVMMs) offer a comparable performance to DRAM, while
requiring lower static power consumption and enabling higher densities. NVMM therefore …
requiring lower static power consumption and enabling higher densities. NVMM therefore …