Planar growth, integration, and applications of semiconducting nanowires
Y Sun, T Dong, L Yu, J Xu, K Chen - Advanced Materials, 2020 - Wiley Online Library
Silicon and other inorganic semiconductor nanowires (NWs) have been extensively
investigated in the last two decades for constructing high‐performance nanoelectronics …
investigated in the last two decades for constructing high‐performance nanoelectronics …
Toward monolithic growth integration of nanowire electronics in 3D architecture: a review
L Liang, R Hu, L Yu - Science China Information Sciences, 2023 - Springer
Abstract Quasi-one-dimensional (1D) semiconducting nanowires (NWs), with excellent
electrostatic control capability, are widely regarded as advantageous channels for the …
electrostatic control capability, are widely regarded as advantageous channels for the …
Engineering island-chain silicon nanowires via a droplet mediated Plateau-Rayleigh transformation
The ability to program highly modulated morphology upon silicon nanowires (SiNWs) has
been fundamental to explore new phononic and electronic functionalities. We here exploit a …
been fundamental to explore new phononic and electronic functionalities. We here exploit a …
Ultra‐Confined Catalytic Growth Integration of Sub‐10 nm 3D Stacked Silicon Nanowires Via a Self‐Delimited Droplet Formation Strategy
R Hu, Y Liang, W Qian, X Gan, L Liang, J Wang, Z Liu… - Small, 2022 - Wiley Online Library
Fabricating ultrathin silicon (Si) channels down to critical dimension (CD)< 10 nm, a key
capability to implementing cutting‐edge microelectronics and quantum charge‐qubits, has …
capability to implementing cutting‐edge microelectronics and quantum charge‐qubits, has …
Epitaxial growth of β-Ga2O3 nanowires from horizontal to obliquely upward evolution
Y Miao, B Liang, Y Tian, T Xiong, S Sun, C Chen - Vacuum, 2021 - Elsevier
Changing the direction of horizontal nanowires to extend them in the z direction and grow
obliquely has important practical significance for achieving higher density integration and …
obliquely has important practical significance for achieving higher density integration and …
Unprecedented uniform 3d growth integration of 10-layer stacked si nanowires on tightly confined sidewall grooves
R Hu, S Xu, J Wang, Y Shi, J Xu, K Chen, L Yu - Nano Letters, 2020 - ACS Publications
Bottom-up catalytic growth offers a high-yield, versatile, and powerful tool for the
construction of versatile 3D nanocomplexes, while the major challenge is to achieve a …
construction of versatile 3D nanocomplexes, while the major challenge is to achieve a …
High performance transparent in-plane silicon nanowire Fin-TFTs via a robust nano-droplet-scanning crystallization dynamics
High mobility, scalable and even transparent thin-film transistors (TFTs) are always being
pursued in the field of large area electronics. While excimer laser-beam-scanning can …
pursued in the field of large area electronics. While excimer laser-beam-scanning can …
Highly stretchable graphene nanoribbon springs by programmable nanowire lithography
C Liu, B Yao, T Dong, H Ma, S Zhang, J Wang… - npj 2D Materials and …, 2019 - nature.com
Graphene nanoribbons are ideal candidates to serve as highly conductive, flexible, and
transparent interconnections, or the active channels for nanoelectronics. However …
transparent interconnections, or the active channels for nanoelectronics. However …
In-plane nanowires with arbitrary shapes on amorphous substrates by artificial epitaxy
R Ben-Zvi, H Burrows, M Schvartzman, O Bitton… - Acs Nano, 2019 - ACS Publications
The challenge of nanowire assembly is still one of the major obstacles toward their efficient
integration into functional systems. One strategy to overcome this obstacle is the guided …
integration into functional systems. One strategy to overcome this obstacle is the guided …
3D sidewall integration of ultrahigh‐density silicon nanowires for stacked channel electronics
X Wu, H Ma, H Yin, D Pan, J Wang, L Yu… - Advanced Electronic …, 2019 - Wiley Online Library
Building 3D electronics represents a promising method for the integration of more
functionalities into a given footprint. To this end, stacked multilevel silicon nanowires …
functionalities into a given footprint. To this end, stacked multilevel silicon nanowires …