The primary focus of this paper is to discuss the modeling of jitter caused by power supply
noise (PSN), named power supply induced jitter (PSIJ). A holistic discussion is presented …

We present a protocol for anonymous communication over the Internet. Our protocol, called
P 5 (Peer-to-Peer Personal Privacy Protocol) provides sender–, receiver–, and sender …

Over the years, the fundamentals of VLSI technology have evolved to include a wide range
of topics and a broad range of practices. To encompass such a vast amount of knowledge …

In this paper we develop a general methodology to analyze crosstalk to obtain insight into
effects that are likely to cause errors in deep submicron high speed circuits. We focus on …

Due to technology scaling and increasing clock frequency, problems due to noise effects
lead to an increase in design/debugging efforts and a decrease in circuit performance. This …

In this paper an accurate, analytical model for the evaluation of the CMOS inverter transient
response and propagation delay for short-channel devices is presented. An exhaustive …

This paper addresses the problem of efficiently and accurately generating two-vector tests
for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital …

Dynamic circuit equations are used to analyze the response of CMOS inverter chains to
stimuli of various forms. Using a normalized description of the CMOS inverter, the conditions …

This paper presents an efficient and accurate numerical analysis technique to simulate
single event upsets (SEUs) in logic circuits. Experimental results that show the method is …

Accurate electrical masking modeling represents a significant challenge in soft error rate
analysis for combinational logic circuits. In this paper, we use table lookup MOSFET models …