Cryogenic MOS transistor model
This paper presents a physics-based analytical model for the MOS transistor operating
continuously from room temperature down to liquid-helium temperature (4.2 K) from …
continuously from room temperature down to liquid-helium temperature (4.2 K) from …
Self-heating effect in FDSOI transistors down to cryogenic operation at 4.2 K
K Triantopoulos, M Cassé, S Barraud… - … on Electron Devices, 2019 - ieeexplore.ieee.org
Self-heating in fully depleted silicon-oninsulator (FDSOI) metal-oxide-semiconductor field-
effect transistors (MOSFETs) is experimentally studied using the gate resistance …
effect transistors (MOSFETs) is experimentally studied using the gate resistance …
Emerging steep-slope devices and circuits: Opportunities and challenges
While continuing the CMOS scaling-down becomes unprecedentedly more challenging than
before, intensive exploration on beyond-CMOS nanodevice technologies is an appealing …
before, intensive exploration on beyond-CMOS nanodevice technologies is an appealing …
A Physical Charge-Based Analytical Threshold Voltage Model for Cryogenic CMOS Design
H Su, Y Cai, S Zhou, G Hu, Y He, Y Xie… - IEEE Journal of the …, 2024 - ieeexplore.ieee.org
This paper proposes a physical charge-based analytical MOSFET threshold voltage model
that explicitly incorporates interface-trapped charges which have been identified as playing …
that explicitly incorporates interface-trapped charges which have been identified as playing …
SPICE compact BJT, MOSFET, and JFET models for ICs simulation in the wide temperature range (from− 200° C to+ 300° C)
KO Petrosyants, LM Sambursky… - … on Computer-Aided …, 2020 - ieeexplore.ieee.org
The temperature range of SPICE models of bipolar and field-effect transistors is extended
from the standard commercial level (-60° C⋯+ 150° C) to harsh conditions level (-200° C⋯+ …
from the standard commercial level (-60° C⋯+ 150° C) to harsh conditions level (-200° C⋯+ …
Effect of deep cryogenic temperature on silicon-on-insulator CMOS mismatch: A circuit designer's perspective
The effect of ultra low operating temperature on mismatch among identically designed
Silicon-on-Sapphire CMOS devices is investigated in detail from a circuit design view point …
Silicon-on-Sapphire CMOS devices is investigated in detail from a circuit design view point …
Cryogenic support circuits and systems for silicon quantum computers
T Lehmann - 2019 IEEE International Symposium on Circuits …, 2019 - ieeexplore.ieee.org
Scaled-up silicon quantum computers show great potential for being manufacturable in
processes similar to modern ultra-deep sub-micron integrated circuit CMOS manufacturing …
processes similar to modern ultra-deep sub-micron integrated circuit CMOS manufacturing …
Cryogenic CMOS for Quantum Computing
To fully deploy power of quantum computing (QC), practical quantum computers require the
integration of a large number of qubits, eg, in the thousands and millions, to overcome the …
integration of a large number of qubits, eg, in the thousands and millions, to overcome the …
New technologies for discovery
For the field of high energy physics to continue to have a bright future, priority within the field
must be given to investments in the development of both evolutionary and transformational …
must be given to investments in the development of both evolutionary and transformational …