A Scaling-Friendly Low-Power Small-Area ADC With VCO-Based Integrator and Intrinsic Mismatch Shaping Capability
This paper presents a first-order scaling-friendly VCO-based closed-loop ΔΣ ADC. It uses
the VCO as both quantizer and integrator, and thus, obviates the need for power-hungry …
the VCO as both quantizer and integrator, and thus, obviates the need for power-hungry …
A 4.5 mW CT Self-Coupled Modulator With 2.2 MHz BW and 90.4 dB SNDR Using Residual ELD Compensation
This paper presents a power-efficient single-loop continuous-time (CT) ΔΣ modulator (DSM)
that achieves a SNDR of 90.4 dB over a 2.2 MHz signal bandwidth. The modulator uses a …
that achieves a SNDR of 90.4 dB over a 2.2 MHz signal bandwidth. The modulator uses a …
A 0.022 mm 98.5 dB SNDR Hybrid Audio Modulator With Digital ELD Compensation in 28 nm CMOS
TC Wang, YH Lin, CC Liu - IEEE Journal of Solid-State Circuits, 2015 - ieeexplore.ieee.org
This work presents a compact-area hybrid continuous-time delta-sigma modulator (CTDSM)
with a shared 6 bit asynchronous successive approximation register (ASAR) quantizer for …
with a shared 6 bit asynchronous successive approximation register (ASAR) quantizer for …
A 64-fJ/Conv.-Step Continuous-Time Modulator in 40-nm CMOS Using Asynchronous SAR Quantizer and Digital Truncator
A third-order single-loop continuous-time sigma-delta modulator (CTSDM) with 6-bit
asynchronous successive approximation register (ASAR) quantizer and digital ΔΣ truncator …
asynchronous successive approximation register (ASAR) quantizer and digital ΔΣ truncator …
A Highly Linear OTA-Free VCO-Based 1-1 MASH ADC
In this paper, a new voltage-controlled oscillator (VCO)-based 1-1 MASH delta-sigma ADC
structure is presented. The proposed architecture does not require any operational …
structure is presented. The proposed architecture does not require any operational …
A 155/spl mu/w 88-db dr discrete-time/spl delta//spl sigma/modulator for digital hearing aids exploiting a summing sar adc quantizer
S Porrazzo, A Morgado, DSS Bello… - IEEE transactions on …, 2013 - ieeexplore.ieee.org
This paper presents a low-power switched-capacitor ΔΣ modulator for digital hearing-aid
applications that features a novel summing successive approximation (SAR). The summing …
applications that features a novel summing successive approximation (SAR). The summing …
A 1 MHz BW 34.2 fJ/step continuous time delta sigma modulator with an integrated mixer for cardiac ultrasound
R Kaald, T Eggen, T Ytterdal - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Fully digitized 2D ultrasound transducer arrays require one ADC per channel with a
beamforming architecture consuming low power. We give design considerations for per …
beamforming architecture consuming low power. We give design considerations for per …
將雜訊整形概念運用於處理量化器量化誤差之連續時間三角積分調變器
BC Huang - 臺灣大學電子工程學研究所學位論文, 2013 - airitilibrary.com
This thesis consists of two works. The first work is a low-power continuous-time delta-sigma
modulator (CTDSM), which consists of a 3rd-order feed-back and feed-forward combined …
modulator (CTDSM), which consists of a 3rd-order feed-back and feed-forward combined …
A general cascaded noise-coupled architecture for ΔΣ modulators with segmented quantization
F Long, Y Zhang, L He, F Lin - 2014 12th IEEE International …, 2014 - ieeexplore.ieee.org
This paper presents a general cascaded architecture for ΔΣ modulators with a high
resolution quantizer. The proposed achitecture is improved from the recently published …
resolution quantizer. The proposed achitecture is improved from the recently published …
An Extended-Range Hybrid Analog-to-Digital Converter for Audio Applications
WA Qureshi - 2020 - iris.unipv.it
The audio subsystem plays undoubtedly a key role in the automotive infotainment system.
With the addition of more features and subsystems, there is an increasing demand for …
With the addition of more features and subsystems, there is an increasing demand for …