Techniques for delegating data processing to a cooperative memory controller

M Jadon, C Robertson, R Lercari - US Patent 10,552,058, 2020 - Google Patents
Processing functions are offloaded to a memory controller for nonvolatile memory by a host
in connection with write data. The nonvolatile memory executes these functions, producing …

Memory controller with at least one address segment defined for which data is striped across flash memory dies, with a common address offset being used to obtain …

AV Kuzmin, JG Wayda - US Patent 10,445,229, 2019 - Google Patents
This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane
NAND flash memory. In one embodiment, the host directly assigns physical addresses and …

Techniques for directed data migration

A Chen, C Robertson, R Lercari… - US Patent 10,552,085, 2020 - Google Patents
(57) ABSTRACT A host stores “context” metadata for logical block addresses (LBAs) in a
manner tied to physical location. Notwithstand ing log-structured or copy on write processes …

Multi-array operation support and related devices, systems and software

AV Kuzmin, JG Wayda - US Patent 9,710,377, 2017 - Google Patents
This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane
NAND flash memory. In one embodiment, the host directly assigns physical addresses and …

Techniques for data migration based on per-data metrics and memory degradation

AV Kuzmin, A Chen, R Lercari - US Patent 10,642,505, 2020 - Google Patents
This disclosure provides techniques for managing memory which match per-data metrics to
those of other data or to memory destination. In one embodiment, wear data is tracked for at …

Memory controller for flash memory with zones configured on die bounaries and with separate spare management per zone

R Lercari, A Chen, M Jadon, C Robertson… - US Patent …, 2020 - Google Patents
This disclosure provides techniques hierarchical address virtualization within a memory
controller and configurable block device allocation. By performing address translation only …

Erasure coding techniques for flash memory

R Lercari, C Robertson, M Jadon - US Patent 11,175,984, 2021 - Google Patents
This disclosure provides a memory controller for asymmetric non-volatile memory, such as
flash memory, and related host and memory system architectures. The memory controller is …

Nonvolatile memory controller that defers maintenance to host-commanded window

AV Kuzmin, M Jadon, RM Mathews - US Patent 10,838,853, 2020 - Google Patents
This disclosure provides for host-controller cooperation in managing NAND flash memory.
The controller maintains information for each erase unit which tracks memory usage. This …

Maintenance of non-volaitle memory on selective namespaces

AV Kuzmin, JG Wayda - US Patent 11,216,365, 2022 - Google Patents
This disclosure provides for improvements in managing multi-drive, multi-die or multi-plane
NAND flash memory. In one embodiment, the host directly assigns physical addresses and …

Hardware-supported per-process metadata tags

DR Cheriton, AY Solomatnikov - US Patent 9,208,082, 2015 - Google Patents
A memory controller is used to receive a first request for a portion of a physical memory and
metadata associated with the portion of the physical memory. The first request for the portion …