Survey of scheduling techniques for addressing shared resources in multicore processors
S Zhuravlev, JC Saez, S Blagodurov… - ACM Computing …, 2012 - dl.acm.org
Chip multicore processors (CMPs) have emerged as the dominant architecture choice for
modern computing platforms and will most likely continue to be dominant well into the …
modern computing platforms and will most likely continue to be dominant well into the …
Heracles: Improving resource efficiency at scale
User-facing, latency-sensitive services, such as websearch, underutilize their computing
resources during daily periods of low traffic. Reusing those resources for other tasks is rarely …
resources during daily periods of low traffic. Reusing those resources for other tasks is rarely …
Vantage: Scalable and efficient fine-grain cache partitioning
D Sanchez, C Kozyrakis - Proceedings of the 38th annual international …, 2011 - dl.acm.org
Cache partitioning has a wide range of uses in CMPs, from guaranteeing quality of service
and controlled sharing to security-related techniques. However, existing cache partitioning …
and controlled sharing to security-related techniques. However, existing cache partitioning …
Cooperative caching for chip multiprocessors
J Chang, GS Sohi - ACM SIGARCH Computer Architecture News, 2006 - dl.acm.org
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP's
aggregate on-chip cache resources. Cooperative caching combines the strengths of private …
aggregate on-chip cache resources. Cooperative caching combines the strengths of private …
[图书][B] The future of computing performance: game over or next level?
LI Millett, SH Fuller - 2011 - books.google.com
The end of dramatic exponential growth in single-processor performance marks the end of
the dominance of the single microprocessor in computing. The era of sequential computing …
the dominance of the single microprocessor in computing. The era of sequential computing …
[PDF][PDF] Managing shared L2 caches on multicore systems in software
In order to effectively size L2 cache partitions, a quantifiable metric is needed to properly
predict performance as a function of L2 cache size. For page management, Miss Rate …
predict performance as a function of L2 cache size. For page management, Miss Rate …
Globally-synchronized frames for guaranteed quality-of-service in on-chip networks
JW Lee, MC Ng, K Asanovic - ACM SIGARCH Computer Architecture …, 2008 - dl.acm.org
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing
to access shared resources, and will require quality-of-service (QoS) support to improve …
to access shared resources, and will require quality-of-service (QoS) support to improve …
Improving resource efficiency at scale with heracles
User-facing, latency-sensitive services, such as websearch, underutilize their computing
resources during daily periods of low traffic. Reusing those resources for other tasks is rarely …
resources during daily periods of low traffic. Reusing those resources for other tasks is rarely …
A note on the power of threshold circuits
E Allender - 30th Annual Symposium on Foundations of Computer …, 1989 - computer.org
Abstract Chip Multiprocessor systems (CMPs) contain more and more cores in every new
generation. However, applications for these systems do not scale at the same pace. Thus, in …
generation. However, applications for these systems do not scale at the same pace. Thus, in …
METE: meeting end-to-end QoS in multicores through system-wide resource management
Management of shared resources in emerging multicores for achieving predictable
performance has received considerable attention in recent times. In general, almost all these …
performance has received considerable attention in recent times. In general, almost all these …