A new process variation and leakage-tolerant domino circuit for wide fan-in OR gates

A Kumar, RK Nagaria - Analog Integrated Circuits and Signal Processing, 2020 - Springer
In this work, a new technique for domino circuit is proposed to reduce the process variations
and power dissipation with optimized delay for wide fan-in OR logic. Two methods are used …

[PDF][PDF] Multi-objective Pareto frontand particle swarm optimization algorithms for power dissipation reduction in microprocessors

DR Sulaiman - International Journal of Electrical and Computer …, 2020 - core.ac.uk
The progress of microelectronics making possible higher integration densities, and a
considerable development of on-board systems are currently undergoing, this growth comes …

Ultra-low-power one-hot transmission-gate multiplexer (OTG-MUX) scalable into large fan-in circuits in 28 nm CMOS

Y Cui, W Shan, P Cao - Integration, 2024 - Elsevier
In this paper, we propose a novel design of a one-hot transmission-gate multiplexer (OTG-
MUX), which combines Complementary Metal Oxide Semiconductor (CMOS) logic with …

Introduction of a new technique for simultaneous reduction of the delay and leakage current in digital circuits

H Mohammadian, MB Tavakolib, F Setoudeh, A Horri - Integration, 2021 - Elsevier
By the reduction in the size of transistors and the development of submicron technology, as
well as the construction of more integrated circuits on chips, leakage power has become one …

A study of leakage and noise tolerant wide fan-in OR logic domino circuits

A Kumar, S Agarwal, V Varshney, A Jain… - …, 2022 - taylorfrancis.com
In recent years, wide fan-in OR logic domino circuits have become essential parts to
implement resister files, PLA, L1 latches, superscalar microprocessors, wide Mux/De-Mux …

Variations-tolerant low power wide fan-in OR logic domino circuit

A Kumar, N Garg, D Tyagi, RK Nagaria - International Journal of …, 2023 - Springer
In this research, a novel strategy for reducing delay and power variations, and power
dissipation in wide fan-in domino OR circuits with better noise immunity is proposed …

A Sub-1áV nanopower subthreshold current and voltage reference using current subtraction technique and cascoded active load

PK Pal, RK Nagaria - Integration, 2020 - Elsevier
A sub-1áV, subthreshold current and voltage references are presented using Cascaded
Current Mirrors (CCM) as temperature compensator and cascoded transistors as active load …

Reduction of variation and leakage in wide fan-in OR Logic domino gate

A Kumar, RK Nagaria - Integration, 2023 - Elsevier
In this paper, a novel domino gate is proposed to decrease the process variability and
leakage current with enhanced noise margin for wide fan-in OR logic. The process variation …

Proposed time‐mode wide fan‐in NAND and NOR gates

SM Sharroush, E Badry - International Journal of Circuit Theory …, 2023 - Wiley Online Library
CMOS circuits usually operate either in the voltage, current, charge, or time domain. Each of
these domains has its own features. As the fan‐in of CMOS circuits increases, the …

On the Integration of AlGaN/GaN HEMT and Micro-Electro-Mechanical Systems (MEMS) For Biomedical Applications: A Review

SKH Bindhu, YK Verma - 2024 International Conference on …, 2024 - ieeexplore.ieee.org
The integration of HEMTs with MEMS opens the opportunity to realize smart sensors. On
chip signal processing, communication, and amplification are the merits of this integration …