Thermal and performance efficient on-chip surface-wave communication for many-core systems in dark silicon era
Due to the exceedingly high integration density of VLSI circuits and the resulting high power
density, thermal integrity became a major challenge. One way to tackle this problem is Dark …
density, thermal integrity became a major challenge. One way to tackle this problem is Dark …
Fuzzy logic-based routing and wavelength assignment with traffic prediction for optical network-on-chip
H Li, J Zhao, F Liu - Engineering Applications of Artificial Intelligence, 2024 - Elsevier
Abstract In Optical Network-on-Chip (ONoC), both routing and wavelength assignment
(RWA) have an impact on the Optical Signal-to-Noise Ratio (OSNR), which further influence …
(RWA) have an impact on the Optical Signal-to-Noise Ratio (OSNR), which further influence …
FIONA: Fine-grained incoherent optical DNN accelerator search for superior efficiency and robustness
Incoherent optical DNN accelerators (OAs) are booming thanks to unparalleled performance-
per-watt and excellent scalability. To boost their innovative development, a recent work …
per-watt and excellent scalability. To boost their innovative development, a recent work …
Universal wavelength reuse mechanism for optical networks-on-chip based on a cooperative game
H Yang, Y Xie, T Song, Y Su, B Liu, J Chai… - Journal of Optical …, 2023 - opg.optica.org
Optical networks-on-chip (ONoCs) based on wavelength division multiplexing (WDM)
technology have lower end-to-end (ETE) delay, larger bandwidth, and higher throughput …
technology have lower end-to-end (ETE) delay, larger bandwidth, and higher throughput …
Optimizing Network Performance and Power Consumption in Green Optical Networking: A Dual Algorithm Approach
M Swamidoss, D Samiayya, M Gunasekar - 2023 - researchsquare.com
Nowadays, there is an increasing need for advanced technological solutions due to
concerns about the energy crisis and environmental protection. In particular, there has been …
concerns about the energy crisis and environmental protection. In particular, there has been …
Design and implementation of congestion aware router for network-on-chip
MT Balakrishnan, TG Venkatesh, AV Bhaskar - Integration, 2023 - Elsevier
Abstract Network-on-Chip (NoC) is the state of the art on-chip interconnection network for
packet based communication. NoCs can offer low packet latency, high bandwidth, high …
packet based communication. NoCs can offer low packet latency, high bandwidth, high …
A Survey of MPSoC Management toward Self-Awareness
G Gonzalez-Martinez, R Sandoval-Arechiga… - Micromachines, 2024 - mdpi.com
Managing Multi-Processor Systems-on-Chip (MPSoCs) is becoming increasingly complex
as demands for advanced capabilities rise. This complexity is due to the involvement of …
as demands for advanced capabilities rise. This complexity is due to the involvement of …
Reinforcement Learning (RL)-based Holistic Routing and Wavelength Assignment in Optical Network-on-Chip (ONoC): Distributed or Centralized?
H Li, J Zhao, F Liu - IEEE Journal on Emerging and Selected …, 2024 - ieeexplore.ieee.org
With the development of silicon photonic interconnects, Optical Network-on-Chip (ONoC)
becomes promising for multi-core/many-core communication. In ONoCs, both routing and …
becomes promising for multi-core/many-core communication. In ONoCs, both routing and …
Design of duel-core connected mesh topology and fine-grained fault-tolerant mechanism for 3D optical network-on-chip
P Guo, X He, Y Yang, K Liu, S Yu, W Hou… - Science China Information …, 2023 - Springer
This paper proposes a fault-tolerant mechanism including a reliable three-dimensional (3D)
topology structure named 3D DCMesh (3D duel-core connected mesh) and a fault-tolerant …
topology structure named 3D DCMesh (3D duel-core connected mesh) and a fault-tolerant …
An Efficient Branch-and-Bound Routing Optimization Method for Optical NoCs
Y Liu, Y Ye - IEEE Transactions on Computer-Aided Design of …, 2024 - ieeexplore.ieee.org
Silicon photonics based optical networks-on-chip (ONoCs) are emerging as a power-
efficient on-chip communication architecture for the next generation of chip multiprocessors …
efficient on-chip communication architecture for the next generation of chip multiprocessors …