AI/ML algorithms and applications in VLSI design and technology

D Amuru, A Zahra, HV Vudumula, PK Cherupally… - Integration, 2023 - Elsevier
An evident challenge ahead for the integrated circuit (IC) industry is the investigation and
development of methods to reduce the design complexity ensuing from growing process …

APOLLO: An automated power modeling framework for runtime power introspection in high-volume commercial microprocessors

Z Xie, X Xu, M Walker, J Knebel… - MICRO-54: 54th Annual …, 2021 - dl.acm.org
Accurate power modeling is crucial for energy-efficient CPU design and runtime
management. An ideal power modeling framework needs to be accurate yet fast, achieve …

PRIMAL: Power inference using machine learning

Y Zhou, H Ren, Y Zhang, B Keller, B Khailany… - Proceedings of the 56th …, 2019 - dl.acm.org
This paper introduces PRIMAL, a novel learning-based framework that enables fast and
accurate power estimation for ASIC designs. PRIMAL trains machine learning (ML) models …

Simmani: Runtime power modeling for arbitrary RTL with automatic signal selection

D Kim, J Zhao, J Bachrach, K Asanović - … of the 52nd Annual IEEE/ACM …, 2019 - dl.acm.org
This paper presents a novel runtime power modeling methodology which automatically
identifies key signals for power dissipation of any RTL design. The toggle-pattern matrix is …

DEEP: Developing extremely efficient runtime on-chip power meters

Z Xie, S Li, M Ma, CC Chang, J Pan, Y Chen… - Proceedings of the 41st …, 2022 - dl.acm.org
Accurate and efficient on-chip power modeling is crucial to runtime power, energy, and
voltage management. Such power monitoring can be achieved by designing and integrating …

McPAT-Calib: A RISC-V BOOM microarchitecture power modeling framework

J Zhai, C Bai, B Zhu, Y Cai, Q Zhou… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Power efficiency has become a nonneglected issue of modern CPUs. Therefore, accurate
and robust power models are highly demanded in academia and industry. However, it is …

Strober: Fast and accurate sample-based energy simulation for arbitrary RTL

D Kim, A Izraelevitz, C Celio, H Kim, B Zimmer… - ACM SIGARCH …, 2016 - dl.acm.org
This paper presents a sample-based energy simulation methodology that enables fast and
accurate estimations of performance and average power for arbitrary RTL designs. Our …

McPAT-Calib: A microarchitecture power modeling framework for modern CPUs

J Zhai, C Bai, B Zhu, Y Cai, Q Zhou… - 2021 IEEE/ACM …, 2021 - ieeexplore.ieee.org
Energy efficiency has become the core issue of modern CPUs, and it is difficult for existing
power models to balance speed, generality, and accuracy. This paper introduces McPAT …

Early stage real-time SoC power estimation using RTL instrumentation

J Yang, L Ma, K Zhao, Y Cai… - The 20th Asia and South …, 2015 - ieeexplore.ieee.org
Early stage power estimation is critical for SoC architecture exploration and validation in
modern VLSI design, but real-time, long time interval and accurate estimation is still …

Manycore simulation for peta-scale system design: Motivation, tools, challenges and prospects

J Zarrin, RL Aguiar, JP Barraca - Simulation Modelling Practice and Theory, 2017 - Elsevier
The architecture design of peta-scale computing systems is complex and presents lots of
difficulties to designs, as current tools lack support for relevant features of future scenarios …