System and method for cryogenic hybrid technology computing and memory
(57) ABSTRACT A system and method for high-speed, low-power cryogenic computing are
presented, comprising ultrafast energy-effi cient RSFQ Superconducting computing circuits …
presented, comprising ultrafast energy-effi cient RSFQ Superconducting computing circuits …
Planarized, extendible, multilayer fabrication process for superconducting electronics
DT Yohannes, RT Hunt, JA Vivalda… - IEEE Transactions …, 2014 - ieeexplore.ieee.org
We report on technique and results for superconductor electronics fabrication process,
featuring customizable number of planarized superconducting layers. The novel technique …
featuring customizable number of planarized superconducting layers. The novel technique …
Method for increasing the integration level of superconducting electronics circuits, and a resulting circuit
D Yohannes, AF Kirichenko, J Vivalda… - US Patent 9,741,918, 2017 - Google Patents
US9741918B2 - Method for increasing the integration level of superconducting electronics
circuits, and a resulting circuit - Google Patents US9741918B2 - Method for increasing the …
circuits, and a resulting circuit - Google Patents US9741918B2 - Method for increasing the …
Method of forming superconducting wiring layers with low magnetic noise
TM Lanting, EG Ladizinsky, JJ Yao, BH Oh - US Patent 10,454,015, 2019 - Google Patents
Fabricating wiring layers above a Josephson junction multi-layer may include removing a
part of the multilayer; depositing an insulating layer to overlie a part of the multilayer; and …
part of the multilayer; depositing an insulating layer to overlie a part of the multilayer; and …
System and method for cryogenic optoelectronic data link
A cryogenic optoelectronic data link, comprising a sending module operating at a cryogenic
temperature less than 100 K. An ultrasensitive electro-optic modulator, sensitive to input …
temperature less than 100 K. An ultrasensitive electro-optic modulator, sensitive to input …
Systems and methods for fabrication of superconducting circuits
E Ladizinsky, N Ladizinsky, J Yao, BH Oh… - US Patent …, 2017 - Google Patents
In one aspect, fabricating a Superconductive integrated cir cuit with a Josephson junction
includes applying oxygen or nitrogen to at least part of a structure formed from an outer …
includes applying oxygen or nitrogen to at least part of a structure formed from an outer …
Low-power biasing networks for superconducting integrated circuits
OA Mukhanov, AF Kirichenko, D Kirichenko - US Patent 9,473,124, 2016 - Google Patents
A superconducting integrated circuit, comprising a plurality of superconducting circuit
elements, each having a variation in operating voltage over time; a common power line; and …
elements, each having a variation in operating voltage over time; a common power line; and …
Systems and methods for fabrication of superconducting integrated circuits
Various techniques and apparatus permit fabrication of Superconductive circuits and
structures, for instance Joseph Sonjunctions, which may, for example be useful in quantum …
structures, for instance Joseph Sonjunctions, which may, for example be useful in quantum …
Double-masking technique for increasing fabrication yield in superconducting electronics
SK Tolpygo - US Patent 9,136,457, 2015 - Google Patents
An improved microfabrication technique for Josephson junctions in superconducting
integrated circuits, based on the use of a double-layer lithographic mask for partial …
integrated circuits, based on the use of a double-layer lithographic mask for partial …
Systems and methods for fabrication of superconducting integrated circuits
Various techniques and apparatus permit fabrication of superconductive circuits and
structures, for instance Josephson junctions, which may, for example be useful in quantum …
structures, for instance Josephson junctions, which may, for example be useful in quantum …