Peak: A single source of truth for hardware design and verification

C Donovick, J Melchert, R Daly, L Truong… - ACM Transactions on …, 2023 - dl.acm.org
Domain-specific languages for hardware can significantly enhance designer productivity,
but sometimes at the cost of ease of verification. On the other hand, ISA specification …

Apex: A framework for automated processing element design space exploration using frequent subgraph analysis

J Melchert, K Feng, C Donovick, R Daly… - Proceedings of the 28th …, 2023 - dl.acm.org
The architecture of a coarse-grained reconfigurable array (CGRA) processing element (PE)
has a significant effect on the performance and energy-efficiency of an application running …

FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism

Y Qiu, Y Mao, X Gao, S Chen, J Li, W Yin… - ACM Transactions on …, 2024 - dl.acm.org
Coarse-grained reconfigurable architectures (CGRAs) have emerged as promising
accelerators due to their high flexibility and energy efficiency. However, existing open …

HierCGRA: A Novel Framework for Large-scale CGRA with Hierarchical Modeling and Automated Design Space Exploration

S Chen, C Cai, S Zheng, J Li, G Zhu, J Li… - ACM Transactions on …, 2024 - dl.acm.org
Coarse-grained reconfigurable arrays (CGRAs) are promising design choices in
computation-intensive domains, since they can strike a balance between energy efficiency …

R-Blocks: an Energy-Efficient, Flexible, and Programmable CGRA

B de Bruin, K Vadivel, M Wijtvliet… - ACM Transactions on …, 2024 - dl.acm.org
Emerging data-driven applications in the embedded, e-Health, and internet of things (IoT)
domain require complex on-device signal analysis and data reduction to maximize energy …

Towards a Unified Implementation of GEMM in BLIS

RQG Xu, FG Van Zee, RA van de Geijn - Proceedings of the 37th …, 2023 - dl.acm.org
Matrix libraries often focus on achieving high performance for problems considered to be
either" small" or" large", as these two scenarios tend to respond best to different optimization …

Building First-Order Energy Modeling Intuition in Computer Architecture Lectures

C Torng - Proceedings of the Workshop on Computer …, 2023 - dl.acm.org
Computer architecture students today arguably do not have as close a connection to energy
as they do to performance. Specifically, they are not trained to reason about energy in a …

Cascade: An application pipelining toolkit for coarse-grained reconfigurable arrays

J Melchert, Y Mei, K Koul, Q Liu… - … on Computer-Aided …, 2024 - ieeexplore.ieee.org
While coarse-grained reconfigurable arrays (CGRAs) have emerged as promising
programmable accelerator architectures, they require automatic pipelining of applications …

[PDF][PDF] Lake: An Agile Framework for Designing and Automatically Configuring Physical Unified Buffers

M Strange, K Sreedhar, M Horowitz - 2024 - capra.cs.cornell.edu
Creating efficient memory subsystems has always been critical for hardware accelerators.
While prior works enable flexible memory generation, the task of mapping streaming …