Design of Energy Efficient IoMT Electrocardiogram (ECG) Machine on 28 nm FPGA

P Singh, B Pandey, N Bhandari, S Bisht, N Bisht… - Towards the Integration …, 2023 - Springer
Abstract An energy-efficient IoMT Electrocardiogram (ECG) machine is proposed in this
article. ECG machine is used to check the heart's rhythm and electrical activity. By analyzing …

[PDF][PDF] Energy Efficient CRC Design for Processor of Workstation, and Server using LVCMOS

A Saxena, C Patel, M Khan - Indian Journal of Science and …, 2017 - academia.edu
In our work we have designed CRC using the LVCMOS IO standards which are stands for
Low Voltage Complementary Metal Oxide Semiconductor. In this work we have worked with …

LVCMOS Based Low Power Implementation of DES Encryption Algorithm on 28nm FPGA

AK Singh, TK Jain, P Pandey… - 2024 3rd International …, 2024 - ieeexplore.ieee.org
The main objective of Input/Output (IO) standard is to match the impedance of input and
output port along with FPGA device. During our research, we observe that different IO …

[PDF][PDF] Study & analysis of role of Li-fi in future

S Gupta, S Gupta, S Pandey, S Ranjan, S Goel… - Int. J. of Smart …, 2016 - gvpress.com
In this hi-tech world, privacy is most important issue. Has anyone ever imagined why this
problem arises? In the field of correspondence media or portable correspondence, web …

A Novel Noise Free Transmission Technique for Designing 100Gb/s Future Generation Optical Communication System

B Das, MFL Abdullah, B Pandey… - International Journal of …, 2017 - vbn.aau.dk
Abstract Differential Phase Shift Keying (DPSK) techniques are widely used in designing the
high-speed communication systems. However, these techniques still need improvement for …

[PDF][PDF] Energy Efficient 10 Gigabit Ethernet Media Access Controller

B Das, MFL Abdullah, B Pandey… - Gyancity Journal of …, 2017 - researchgate.net
In this paper, 10 Gigabit Ethernet Media Access Controller (10GEMAC) is designed that
consumes less power. The 10 Gigabit Ethernet Media Access Controller is designed by …

[PDF][PDF] LVCMOS IO Standards Based Processor Specific Green Comparator Design

PSG Comparator - academia.edu
In this research paper we have designed green comparator to attain less power
consumption. We have implemented our design with LVCMOS IOs standard which is stands …

[PDF][PDF] Low Power Design of Video PHY Controller (2.0) for HDMI Protocol Using Unidirectional High Performance IO Standard

B Das, MFL Abdullah, N Pandey - researchgate.net
The Video PHY controller is an important device that provides the interface between
Transceivers and video interfaces. This interface either is HDMI or Displayport. HDMI Video …

Performance Analysis of Video PHY Controller Using Unidirection and Bi-directional IO Standard via 7 Series FPGA

B Das, MFL Abdullah, N Pandey, G Verma - Gyancity Journal of …, 2017 - vbn.aau.dk
The Video PHY controller offers an interface between transmitters/receivers and video ports.
These video ports are categorized in HDMI or Displayport. HDMI Video PHY controller are …

Power Efficient Design of DisplayPort (7.0) Using Low-voltage differential signaling IO Standard Via UltraScale Field Programming Gate Arrays

B Das, MFL Abdullah, B Pandey - Gyancity Journal of Electronics & …, 2017 - vbn.aau.dk
Abstract The DisplayPort (7.0) provides transection of serial-digital video displays, it has TX
and RX Controllers along with pixel video interface, with streaming line rate of maximum 5.4 …