Testing of semiconductor chips with microbumps
BACKGROUND Integrated circuits have experienced continuous rapid growth due to
constant improvements in the integration den sity of various electronic components (ie …
constant improvements in the integration den sity of various electronic components (ie …
Packaging methods and structures using a die attach film
JP Hung, JC Lin, LIU Nai-Wei, CC Chang… - US Patent …, 2015 - Google Patents
BACKGROUND Semiconductor devices are used in a variety of electronic applications, such
as personal computers, cellphones, digital cameras, and other electronic equipment, as …
as personal computers, cellphones, digital cameras, and other electronic equipment, as …
3DIC stacking device and method of manufacture
JC Lin, CH Yu - US Patent 9,443,783, 2016 - Google Patents
A system and method for stacking semiconductor devices in three dimensions is provided. In
an embodiment two or more semiconductor dies are attached to a carrier and encapsulated …
an embodiment two or more semiconductor dies are attached to a carrier and encapsulated …
Process of vertically stacking multiple wafers supporting different active integrated circuit (IC) devices
S Kim, R List, S Kellar - US Patent App. 11/603,521, 2007 - Google Patents
A method of vertically stacking wafers is provided to form three-dimensional (3D) wafer
stack. Such method comprising: selectively depositing a plurality of metallic lines on …
stack. Such method comprising: selectively depositing a plurality of metallic lines on …
Hybrid bonding with through substrate via (TSV)
JC Lin - US Patent 9,087,821, 2015 - Google Patents
Embodiments of forming a semiconductor device structure are provided. The semiconductor
device structure includes a first semiconductor wafer and a second semiconductor wafer …
device structure includes a first semiconductor wafer and a second semiconductor wafer …
Three-dimensional system-in-package architecture
OMK Law, KH Wu - US Patent 8,487,444, 2013 - Google Patents
BACKGROUND Generally, through-silicon vias (TSVs) have been used to form electrical
connections within System-in-Package (SiP) architectures to connect multiple …
connections within System-in-Package (SiP) architectures to connect multiple …
Method for stacking devices
D Wang, CH Lee, CS Chen, C Chao, MJ Lii… - US Patent …, 2012 - Google Patents
BACKGROUND The present disclosure relates generally to semiconductor manufacturing
and, more particularly, to a method for fabri cating a stacked semiconductor device. Vias …
and, more particularly, to a method for fabri cating a stacked semiconductor device. Vias …
Embedded 3D interposer structure
YC Shih, JC Lin, WC Chiou, S Jeng, CH Yu - US Patent 8,426,961, 2013 - Google Patents
A device includes an interposer, which includes a substrate; and at least one dielectric layer
over the substrate. A plurality of through-substrate vias (TSVs) penetrate through the …
over the substrate. A plurality of through-substrate vias (TSVs) penetrate through the …
Electronic packaging including die with through silicon via
CK Williams, RE Thomas - US Patent 7,317,256, 2008 - Google Patents
An apparatus, method, and system for electronic device packaging having stacked dice are
disclosed herein. A first die has a through silicon via formed therethrough. A second die is …
disclosed herein. A first die has a through silicon via formed therethrough. A second die is …
Method of forming a multi-layer semiconductor structure incorporating a processing handle member
A method of forming a multi-layer semiconductor structure includes attaching a handle-
member to a top surface of a first structure using a first interface. At least one region of a …
member to a top surface of a first structure using a first interface. At least one region of a …