AI/ML algorithms and applications in VLSI design and technology
An evident challenge ahead for the integrated circuit (IC) industry is the investigation and
development of methods to reduce the design complexity ensuing from growing process …
development of methods to reduce the design complexity ensuing from growing process …
Role of Artificial Intelligence in VLSI Design: A Review
Artificial intelligence (AI) related technologies are being employed more and more in a
range of industries to increase automation and improve productivity. The increasing volumes …
range of industries to increase automation and improve productivity. The increasing volumes …
Statistical behaviour of laser-induced plasma and its complementary characteristic signals
In this work, we present a study aimed at the statistical distribution of characteristic signals of
laser-induced plasmas. This work mainly focuses on observing statistical distribution for …
laser-induced plasmas. This work mainly focuses on observing statistical distribution for …
A Statistical Cell Delay Model for Estimating the 3σ Delay by Matching Kurtosis
Accurate standard cell modeling is significant for circuit timing analysis and yield estimation.
With voltage decreasing to near-threshold, cell delay distribution becomes asymmetrical and …
With voltage decreasing to near-threshold, cell delay distribution becomes asymmetrical and …
A Novel Delay Calibration Method Considering Interaction between Cells and Wires
In the advanced technology, the accuracy of cell and wire delay modeling are the key
metrics for timing analysis. However, when the supply voltage decreases to the near …
metrics for timing analysis. However, when the supply voltage decreases to the near …
An Improved Path Delay Variability Model via Multi-Level Fan-Out-of-4 Metric for Wide-Voltage-Range Digital CMOS Circuits
Y Cui, W Shan, W Dai, X Liu, J Guo… - Chinese Journal of …, 2023 - ieeexplore.ieee.org
In advanced CMOS technology, process, voltage, and temperature (PVT) variations increase
the paths' latency in digital circuits, especially when operating at a low supply voltage. The …
the paths' latency in digital circuits, especially when operating at a low supply voltage. The …
A Deep-Learning-Based Statistical Timing Prediction Method for Sub-16nm Technologies
Pre-routing timing estimation is vital but challenging since accurate net information is
available only after routing and parasitic extraction. Existing methodologies predict the …
available only after routing and parasitic extraction. Existing methodologies predict the …
VASTA: A wide voltage statistical timing analysis tool based on variation-aware cell delay models
In the advanced technology nodes, process parameter variations are increasingly resulting
in unpredictable device behavior. The issue is even aggravated by low power requirements …
in unpredictable device behavior. The issue is even aggravated by low power requirements …
Joint estimation of multiple time interleaved adc timing offsets based on fourier series decomposition
G Paryanti, D Sadot - Journal of Lightwave Technology, 2020 - opg.optica.org
A method for reducing the complexity of estimating multiple timing offset in time interleaved
analog to digital converter based on Fourier series decomposition is proposed. The timing …
analog to digital converter based on Fourier series decomposition is proposed. The timing …
Statistical Strategies to Capture Correlation Between Overshooting Effect and Propagation Delay Time in Nano-CMOS Inverters
In this paper, we model statistical correlation between overshooting effect and propagation
delay time in nano-CMOS technology considering the influence of intrinsic parameter …
delay time in nano-CMOS technology considering the influence of intrinsic parameter …