Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
In accordance with a preferred embodiment of the present invention, a silicon-on-insulator
(SOI) chip includes a silicon layer of a predetermined thickness overlying an insulator layer …
(SOI) chip includes a silicon layer of a predetermined thickness overlying an insulator layer …
Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
(57) ABSTRACT A semiconductor chip includes a semiconductor Substrate 126, in which
first and second active regions are disposed. A resistor 124 is formed in the first active …
first and second active regions are disposed. A resistor 124 is formed in the first active …
Strained channel complementary field-effect transistors
US PATENT DOCUMENTS formed from a first semiconductor material and the Source
4,069,094. A 1, 1978 Sh 1 and drain regions are formed from a second semiconductor 43 1 …
4,069,094. A 1, 1978 Sh 1 and drain regions are formed from a second semiconductor 43 1 …
Strained-channel transistor and methods of manufacture
A semiconductor device includes a region of semiconductor material with first and second
isolation trenches formed therein. The first isolation trench is lined with a first material having …
isolation trenches formed therein. The first isolation trench is lined with a first material having …
Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors
In accordance with a preferred embodiment of the present invention, a silicon-on-insulator
(SOI) chip includes a sili con layer of a predetermined thickness overlying an insu lator layer …
(SOI) chip includes a sili con layer of a predetermined thickness overlying an insu lator layer …
Strained channel on insulator device
A semiconductor device 10 includes a substrate 12 (eg, a silicon substrate) with an
insulating layer 14 (eg, an oxide such as silicon dioxide) disposed thereon. A first …
insulating layer 14 (eg, an oxide such as silicon dioxide) disposed thereon. A first …
Strained channel complementary field-effect transistors and methods of manufacture
(57) ABSTRACT A transistor includes a gate dielectric overlying a channel region. A source
region and a drain region are located on opposing sides of the channel region. The channel …
region and a drain region are located on opposing sides of the channel region. The channel …
Strained silicon structure
CH Ge, WC Lee, C Hu - US Patent 6,902,965, 2005 - Google Patents
A semiconductor device includes a substrate, a first epitaxial layer, a second epitaxial layer,
a third epitaxial layer, a first trench, and a second trench. The first epitaxial layer is formed on …
a third epitaxial layer, a first trench, and a second trench. The first epitaxial layer is formed on …
Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors
(57) ABSTRACT A static memory element includes a? rst inverter having an input coupled to
a left bit node and an output coupled to a right bit node. A second inverter has an input …
a left bit node and an output coupled to a right bit node. A second inverter has an input …
Capacitor with enhanced performance and method of manufacture
5,447,884 A 9/1995 Fahey et al_ A decoupling capacitor is formed in a semiconductor~ sub
5'461'250 A 10/1995 BurghartZ et a1_ strate that includes a strained srhcon layer. A …
5'461'250 A 10/1995 BurghartZ et a1_ strate that includes a strained srhcon layer. A …