A survey of techniques for architecting and managing asymmetric multicore processors
S Mittal - ACM Computing Surveys (CSUR), 2016 - dl.acm.org
To meet the needs of a diverse range of workloads, asymmetric multicore processors
(AMPs) have been proposed, which feature cores of different microarchitecture or ISAs …
(AMPs) have been proposed, which feature cores of different microarchitecture or ISAs …
Scheduling heterogeneous multi-cores through performance impact estimation (PIE)
Single-ISA heterogeneous multi-core processors are typically composed of small (eg, in-
order) power-efficient cores and big (eg, out-of-order) high-performance cores. The …
order) power-efficient cores and big (eg, out-of-order) high-performance cores. The …
An analysis of accelerator coupling in heterogeneous architectures
Existing research on accelerators has emphasized the performance and energy efficiency
improvements they can provide, devoting little attention to practical issues such as …
improvements they can provide, devoting little attention to practical issues such as …
Fairness-aware scheduling on single-ISA heterogeneous multi-cores
Single-ISA heterogeneous multi-cores consisting of small (eg, in-order) and big (eg, out-of-
order) cores dramatically improve energy-and power-efficiency by scheduling workloads on …
order) cores dramatically improve energy-and power-efficiency by scheduling workloads on …
Network coding in heterogeneous multicore IoT nodes with DAG scheduling of parallel matrix block operations
Random linear network coding (RLNC) has the potential to improve the performance of
current and future Internet of Things (IoT) communication systems, but is computationally …
current and future Internet of Things (IoT) communication systems, but is computationally …
Energy-efficient thread assignment optimization for heterogeneous multicore systems
The current trend to move from homogeneous to heterogeneous multicore systems provides
compelling opportunities for achieving performance and energy efficiency goals. Running …
compelling opportunities for achieving performance and energy efficiency goals. Running …
An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPs
The importance of dynamic thread scheduling is increasing with the emergence of
Asymmetric Multicore Processors (AMPs). Since the computing needs of a thread often vary …
Asymmetric Multicore Processors (AMPs). Since the computing needs of a thread often vary …
Starchart: Hardware and software optimization using recursive partitioning regression trees
Graphics processing units (GPUs) are in increasingly wide use, but significant hurdles lie in
selecting the appropriate algorithms, runtime parameter settings, and hardware …
selecting the appropriate algorithms, runtime parameter settings, and hardware …
Lucky Scheduling for {Energy-Efficient} Heterogeneous {Multi-Core} Systems
Heterogeneous multi-core processors with big/high-performance and small/low-power cores
have been proposed as an alternative design to improve energy efficiency over traditional …
have been proposed as an alternative design to improve energy efficiency over traditional …
PAGURUS: Low-overhead dynamic information flow tracking on loosely coupled accelerators
L Piccolboni, G Di Guglielmo… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
Software-based attacks exploit bugs or vulnerabilities to get unauthorized access or leak
confidential information. Dynamic information flow tracking (DIFT) is a security technique to …
confidential information. Dynamic information flow tracking (DIFT) is a security technique to …