A 16-kB 65-nm GC-eDRAM Macro With Internal Bias Voltage Generation Providing Over 100-s Retention Time
O Harel, A Yigit, E Feifel, R Giterman… - IEEE Journal of Solid …, 2024 - ieeexplore.ieee.org
Gain-cell embedded dynamic random access memory (GC-eDRAM) has emerged as a
suitable choice for embedded memory implementation due to its high density, low leakage …
suitable choice for embedded memory implementation due to its high density, low leakage …
Refresh algorithm for ensuring 100% memory availability in gain-cell embedded DRAM macros
R Golman, N Nachum, T Cohen, R Giterman… - IEEE …, 2021 - ieeexplore.ieee.org
Gain-cell embedded DRAM (GC-eDRAM) is a dense, low power option for embedded
memory implementation, supporting low supply voltages; however, it suffers from limited …
memory implementation, supporting low supply voltages; however, it suffers from limited …
Design and Development of Novel Refresh Technique for Gain Cell Embedded DRAM
Gain cell embedded DRAM (GC-eDRAM) is a type of dynamic random access memory
(DRAM) architecture that is widely used in embedded systems, such as microcontrollers …
(DRAM) architecture that is widely used in embedded systems, such as microcontrollers …
DESIGN AND DEVELOP LOW-POWER MEMORY CONTROLLER FOR GAIN CELL− EMBEDDED DYNAMIC RANDOM-ACCESS MEMORY CELL USING …
C Shravan, K Fatima… - … and Radio Engineering, 2024 - dl.begellhouse.com
DESIGN AND DEVELOP LOW-POWER MEMORY CONTROLLER FOR GAIN CELL–EMBEDDED
DYNAMIC RANDOM-ACCESS MEMORY CELL USING INTELLIGENT CL Page 1 0040-2508/24/$35.00 …
DYNAMIC RANDOM-ACCESS MEMORY CELL USING INTELLIGENT CL Page 1 0040-2508/24/$35.00 …
Design and characterisation of a GC-eDRAM memory array with 22nm transistor
MC Briand - 2020 - webthesis.biblio.polito.it
BRIAND Page 1 https://www.overleaf.com/project/5eeca6d3937f5a0001903351 Malo
BRIAND Design and characterisation of a GC-eDRAM memory array with 22nm transistor …
BRIAND Design and characterisation of a GC-eDRAM memory array with 22nm transistor …