Chiplet heterogeneous integration technology—Status and challenges
T Li, J Hou, J Yan, R Liu, H Yang, Z Sun - Electronics, 2020 - mdpi.com
As a heterogeneous integration technology, the chiplet-based design technology integrates
multiple heterogeneous dies of diverse functional circuit blocks into a single chip by using …
multiple heterogeneous dies of diverse functional circuit blocks into a single chip by using …
Simba: Scaling deep-learning inference with multi-chip-module-based architecture
Package-level integration using multi-chip-modules (MCMs) is a promising approach for
building large-scale systems. Compared to a large monolithic die, an MCM combines many …
building large-scale systems. Compared to a large monolithic die, an MCM combines many …
Silicon photonics for terabit/s communication in data centers and exascale computers
Abstract Silicon Photonics Technology using sub micrometer SOI platform, which
commercially emerged at the beginning of the century, has now gained market shares in the …
commercially emerged at the beginning of the century, has now gained market shares in the …
IntAct: A 96-core processor with six chiplets 3D-stacked on an active interposer with distributed interconnects and integrated power management
P Vivet, E Guthmuller, Y Thonnart… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
In the context of high-performance computing, the integration of more computing capabilities
with generic cores or dedicated accelerators for artificial intelligence (AI) application is …
with generic cores or dedicated accelerators for artificial intelligence (AI) application is …
Scaling superconducting quantum computers with chiplet architectures
Fixed-frequency transmon quantum computers (QCs) have advanced in coherence times,
addressability, and gate fidelities. Unfortunately, these devices are restricted by the number …
addressability, and gate fidelities. Unfortunately, these devices are restricted by the number …
Freely scalable and reconfigurable optical hardware for deep learning
As deep neural network (DNN) models grow ever-larger, they can achieve higher accuracy
and solve more complex problems. This trend has been enabled by an increase in available …
and solve more complex problems. This trend has been enabled by an increase in available …
SIAM: Chiplet-based scalable in-memory acceleration with mesh for deep neural networks
G Krishnan, SK Mandal, M Pannala… - ACM Transactions on …, 2021 - dl.acm.org
In-memory computing (IMC) on a monolithic chip for deep learning faces dramatic
challenges on area, yield, and on-chip interconnection cost due to the ever-increasing …
challenges on area, yield, and on-chip interconnection cost due to the ever-increasing …
Nn-baton: Dnn workload orchestration and chiplet granularity exploration for multichip accelerators
The revolution of machine learning poses an unprecedented demand for computation
resources, urging more transistors on a single monolithic chip, which is not sustainable in …
resources, urging more transistors on a single monolithic chip, which is not sustainable in …
Beyond the memory wall: A case for memory-centric hpc system for deep learning
As the models and the datasets to train deep learning (DL) models scale, system architects
are faced with new challenges, one of which is the memory capacity bottleneck, where the …
are faced with new challenges, one of which is the memory capacity bottleneck, where the …
Mitosis: Transparently self-replicating page-tables for large-memory machines
Multi-socket machines with 1-100 TBs of physical memory are becoming prevalent.
Applications running on such multi-socket machines suffer non-uniform bandwidth and …
Applications running on such multi-socket machines suffer non-uniform bandwidth and …